Binary digit multiplications and applications
AssigneeThe Regents of the University of California
InventorTe Hu
Life of this patent
Estimating the term…
Abstract
A multiplying system for binary digits. The digits are multiplied in a rectangular memory array, where the digits are placed along the edges, and intersections between 1's form blocks of 1's in the memory array. The blocks of 1's are evaluated based on a weighting assigned to positions within the memory, either directly, or by reducing each block to a reduced block representation. The system can be used for multiplications, partial multiplications, and divisions, as well as applications thereof.
Claims72
A method comprising:
- multiplying a first binary value by a second binary value and accumulating information indicative of areas of intersections between 1's in said first binary value and 1's in said second binary value;
- and
- evaluating said information indicative of said areas of intersections to determine a value related to said multiplying.
A system comprising:
- a memory, having a plurality of memory locations;
- a multiplier, that receives a first binary value and a second binary value and accumulates information indicative of areas of intersections between 1's in said first binary value and 1's in said second binary value in said memory and evaluates said information indicative of said areas of intersections to determine a value related to multiplying said first binary value by said second binary value.
A computer-readable medium containing a set of instructions for a general purpose computing part, the set of instructions comprising:
- Obtaining a first binary value and a second binary value;
- accumulating information indicative of areas of intersections between 1's in said first binary value and 1's in said second binary value;
- and
- evaluating said information indicative of said areas of intersections to determine a value related to multiplying of said first binary value by said second binary value.
A method, comprising:
- analyzing a first value and a second value to obtain an interim value with at least one two-dimensional block representing same value bits therein;
- reducing at least one of said two-dimensional blocks to a reduced representation which includes four symbols that represent the value attributable to said one two-dimensional block;
- and
- evaluating said reduced representation to determine a result related to a multiplying of said first value by said second value.
A system, comprising:
- a processor, receiving a first value and a second value, and processing said first and second values to obtain an interim value with at least one two-dimensional block representing same value bits therein, said processory operating to reduce at least one of said two-dimensional blocks to a reduced representation which includes four symbols that represent the value attributable to said one two-dimensional block and evaluating said reduced representation to determine a result related to a multiplying of said first value by said second value.
A method, comprising:
- obtaining a first number and a second number to be multiplied;
- and
- accumulating partial results from a multiplying by finding blocks of values at intersections between 1's in the first and second numbers, and accumulating results from said blocks of values, wherein each partial result from each block of values is accumulated separately without carry over from any other block of values.
A method, comprising:
- using a computer to multiply a first value having a plurality of bits by a second value having a plurality of bits;
- and
- obtaining a portion of a solution attributable to more significant bits before obtaining another portion of the solution attributable to less significant bits.
An apparatus, comprising:
- Means for multiplying a first value having a plurality of bits by a second value having a plurality of bits;
- and
- Means for obtaining a portion of a solution attributable to more significant bits before obtaining another portion of the solution attributable to less significant bits.
Dependencies are inferred from the claim text.