Transistor device and method of manufacture thereof
AssigneeInfineon Technologies AG
InventorsHongfa Luan, Hong-Jyh Li
Life of this patent
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Abstract
Methods of forming CMOS devices and structures thereof. A workpiece is provided having a first region and a second region. A high k gate dielectric material is formed over the workpiece. A first gate material comprising a first metal is formed over the high k gate dielectric material. The first gate material in the second region is implanted with a material different than the first metal to form a second gate material comprising a second metal. The work function of the CMOS device is set by the material selection of the gate materials.
Claims26
A method of manufacturing a semiconductor device, the method comprising:
- providing a workpiece, the workpiece comprising a first region and a second region;
- forming a gate dielectric material over the workpiece;
- forming a first gate material over the gate dielectric material, the first gate material comprising a first metal;
- implanting a material into the first gate material over the second region of the workpiece to form a second gate material in the second region of the workpiece;
- and
- patterning the first gate material, the second gate material, and the gate dielectric to form a first transistor in the first region of the workpiece and a second transistor in the second region of the workpiece, the first transistor including a first gate comprised of the first gate material, and the second transistor including a second gate comprised of the second gate material.
A method of manufacturing a complimentary metal oxide semiconductor (CMOS) device, the method comprising:
- providing a workpiece, the workpiece comprising a first region and a second region;
- forming a gate dielectric material over the workpiece, the gate dielectric material comprising a dielectric constant of about 4.0 or greater;
- forming a first gate material over the gate dielectric material, the first gate material comprising a first metal;
- implanting a first material into the first gate material over the second region of the workpiece to form a second gate material in the second region of the workpiece, the second gate material comprising a second metal, the second metal comprising the first metal and the first material;
- and
- patterning the first gate material, the second gate material, and the gate dielectric material to form a first transistor in the first region of the workpiece and a second transistor in the second region of the workpiece, the first transistor including a first gate comprised of the first gate material, and the second transistor including a second gate comprised of the second gate material, wherein forming either the first transistor or the second transistor comprises forming a positive channel metal oxide semiconductor (PMOS) device or a negative channel metal oxide semiconductor (NMOS) device.
A complimentary metal oxide semiconductor (CMOS) device, comprising:
- a workpiece, the workpiece including a first region and a second region;
- a gate dielectric disposed over the workpiece, wherein the gate dielectric comprises a dielectric constant of about 4.0 or greater;
- a first gate disposed over the gate dielectric in the first region of the workpiece, the first gate comprising a first metal and comprising a gate of a first transistor;
- a second gate disposed over the gate dielectric in the second region of the workpiece, the second gate comprising the first metal implanted with a material and comprising a gate of a second transistor, the material being different than the first metal, wherein one of the first transistor or the second transistor comprises a positive channel metal oxide semiconductor (PMOS) device, and wherein the other of the first transistor or the second transistor comprises a negative channel metal oxide semiconductor (NMOS) device.
Dependencies are inferred from the claim text.