Non-volatile semiconductor memory
AssigneeKabushiki Kaisha Toshiba
InventorsKiyofumi Sakurai, Hiroshi Maejima
Life of this patent
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Abstract
A non-volatile semiconductor memory includes: a cell array including a plurality of memory cells arranged in a matrix; a plurality of bit lines extending in a column direction of the matrix; a sense amplifier configured to amplify data read out from the memory cells via the bit lines; a shield power supply providing a voltage to shield the bit lines; and a bit line selection circuit, configured to connect even bit lines to the shield power supply when odd bit lines are connected to the sense amplifier, and to connect the odd bit lines to the shield power supply when the even bit lines are connected to the sense amplifier.
Claims20
A non-volatile semiconductor memory comprising:
- a cell array including a plurality of memory cells arranged in a matrix;
- a plurality of bit lines extending in a column direction of the matrix;
- a sense amplifier configured to amplify data read out from the memory cells via the bit lines;
- a shield power supply providing a voltage to shield the bit lines;
- and
- a bit line selection circuit, configured to connect even bit lines to the shield power supply when odd bit lines are connected to the sense amplifier, and to connect the odd bit lines to the shield power supply when the even bit lines are connected to the sense amplifier.
Dependencies are inferred from the claim text.