Fabrication method of a semiconductor device
AssigneeFujitsu Limited
InventorHisatsugu Shirai
Life of this patent
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Abstract
A method of fabricating a semiconductor device includes an exposure step conducted by using a reticle. The method includes the steps of exposing a first pattern on a wafer by using a first reticle having a first reticle error, and exposing a second pattern on the wafer in alignment with the first pattern by using a second reticle having a second error, wherein the step of exposing the second pattern uses a reticle having a reticle error that satisfies a requirement of critical alignment error as the second reticle, the critical alignment error being determined from a design rule applied to the wafer, the critical alignment error being further determined with reference to the first reticle error of the first reticle.
Claims8
A method of fabricating a semiconductor device including an exposure step conducted by using a reticle, said method comprising the steps of:
- exposing a first pattern on a wafer by using a first reticle having a first reticle error;
- and
- exposing a second pattern on said wafer in alignment with said first pattern by using a second reticle having a second error,
- wherein said step of exposing said second pattern uses a reticle having a reticle error that satisfies a requirement of critical alignment error as said second reticle, said critical alignment error being determined from a design rule applied to said wafer, said critical alignment error being further determined with reference to said first reticle error.
Dependencies are inferred from the claim text.