High-gain bipolar junction transistor compatible with complementary metal-oxide-semiconductor (CMOS) process and method for fabricating the same

A method for forming a bipolar junction transistor, comprising:

• forming a collector region of a second conductive type in a substrate of a first conductive type including a device isolation layer;
• forming a base region of a first conductive type by performing an ion implantation process separately from a process for forming a well of the first conductive type for a metal-oxide-semiconductor transistor of the second conductive type;
• and
• forming an emitter region of a second conductive type in the base region by performing an ion implantation process for forming source/drain regions of the metal-oxide-semiconductor transistor of the second conductive type.

A method for fabricating a semiconductor device, the method comprising:

• forming a first well of a second conductive type for forming a collector region of a bipolar junction transistor in a substrate of a first conductive type, wherein the substrate of the first conductive type includes a device isolation layer;
• forming a second well of the second conductive type within the first well of the second conductive type wherein the second well serves as a buffer for the collector region;
• forming a third well of the second conductive type for forming a metal-oxide-semiconductor (MOS) transistor of the first conductive type in the substrate and disposed outside the first well of the second conductive type;
• forming a fourth well of the first conductive type for forming a metal-oxide-silicon transistor of the second conductive type within the first well of the second conductive type;
• forming a base region shallower than the device isolation layers within the first well of the second conductive type;
• forming a gate electrode for the metal-oxide-semiconductor transistor of the second conductive type on the fourth well of the first conductive type and a gate electrode for the metal-oxide-semiconductor transistor of the first conductive type on the third well of the second conductive type;
• simultaneously forming source/drain regions of the second conductive type beneath both lateral sides of the gate electrode formed on the fourth well, an emitter region of the second conductive type in the base region and a plurality of collector contacts in the second wells of the second conductive type;
• and
• forming source/drain regions of the first conductive type beneath both lateral sides of the gate electrode formed on the third well of the second conductive type and a base contact isolated from the emitter region in the base region.

A bipolar junction transistor, comprising:

• a collector region of a second conductive type formed in a substrate of a first conductive type and isolated by a device isolation layer;
• a buffer region of the second conductive type formed within the collector region and being deeper than the device isolation layer;
• a base region of the first conductive type formed within the collector region, isolated from the buffer region by the device isolation layers and being shallower than the device isolation layer;
• and
• an emitter region of the second conductive type formed within the base region of the first conductive type.

A semiconductor device, comprising:

• a first well of a second conductive type for a collector region of a bipolar junction transistor, the first well formed in a substrate of a first conductive type and isolated by a device isolation layer;
• a second well of the second conductive type being formed within the first well of the second conductive type and serving as a buffer for the collector region;
• a third well of the second conductive type for forming a metal-oxide-semiconductor transistor of the first conductive type, the third well formed in the substrate disposed outside the first well of the second conductive type and isolated from the first well of the second conductive type by the device isolation layer;
• a fourth well of the first conductive type for forming a metal-oxide-semiconductor transistor of the second conductive type, the fourth well formed within the first well of the second conductive type and isolated from the second wells of the second conductive type by the device isolation layer;
• a base region of the first conductive type formed within the first well of the second conductive type, isolated from the second wells of the second conductive type by the device isolation layer and shallower than the device isolation layer;
• an emitter region of the second conductive type formed within the base region;
• and
• the metal-oxide-semiconductor transistor of the second conductive type formed on the fourth well of the first conductive type and the metal-oxide-semiconductor transistor of the first conductive type formed on the third well of the second conductive type.

A semiconductor device, comprising:

• a collector region of a second conductive type formed in a substrate of a first conductive type, isolated by a device isolation layer and deeper than the device isolation layer;
• a well of the first conductive type for forming a metal-oxide-semiconductor transistor of the second conductive type, the well of the first conductive type formed within the collector region and deeper than the device isolation layer;
• a base region of the first conductive type formed within the collector region and shallower than the device isolation layer;
• an emitter region of the second conductive type formed within the base region of the first conductive type;
• and
• the metal-oxide-semiconductor transistor of the second conductive type formed on the well of the first conductive type.