Electronic device and method for designing the same
AssigneeFujitsu Limited
InventorNaoki Idani
Life of this patent
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Abstract
The electronic device comprises a plurality of layout regions each including a plurality of patterns defined by a buried structure buried in a substrate. For each of the layout regions, in each of the layout regions, the minimum space between the patterns, and a maximum area percentage allowed for the patterns in the layout region are defined based on a size of the layout region. In larger one of the layout regions, the minimum space between the patterns in the region is set larger.
Claims15
An electronic device comprising a plurality of layout regions each including a plurality of patterns defined by a buried structure buried in a substrate,
- for each of the layout regions, a minimum space between the patterns and a maximum area percentage allowed for the patterns being defined based on a size of the layout region, and
- in larger one of the layout regions, the minimum space between the patterns in the layout region being set larger.
An electronic device comprising a plurality of layout regions each including a plurality of patterns defined by a buried structure buried in a substrate,
- for each of the layout regions, a minimum space between the patterns and a maximum area percentage allowed for the patterns being defined based on a size of the layout region, and
- in that of the layout regions, where the maximum area percentage allowed for the patterns is higher, the minimum space between the patterns in the layout region being set larger.
A method for designing an electronic device comprising a layout region including a plurality of patterns defined by a buried structure buried in a substrate,
- a minimum space between the patterns in the layout region, and a maximum area percentage allowed for the patterns in the layout region being set based on a size of the layout region.
Dependencies are inferred from the claim text.