Low capacitance two-terminal barrier controlled TVS diodes
AssigneeTyco Electronics Corporation
InventorsAdrian Cogan, Jin Qiu, Richard Blanchard
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Abstract
A two-terminal barrier controlled TVS diode has a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and the cathode electrode, and may be arranged such that the anode region provides conductivity modulation by injecting minority carriers into the channel region during conduction of the semiconductor structure. In presently preferred form the majority carriers are electrons and the minority carriers are holes. Fabrication methods are described.
Claims30
A two-terminal unipolar short channel barrier controlled transient voltage suppression (TVS) diode for forward conduction at a predetermined clamping voltage level above a level associated with conventional semiconductor material doping level and junction type of a semiconductor diode, and comprising a semiconductor substrate including:
- (a) a backside anode electrode conductor layer formed along a back surface of the substrate;
- (b) an anode region extending to a predetermined thickness in the substrate next to the anode electrode conductor layer and being doped with majority carriers in a first concentration;
- (c) a transverse channel region extending in the substrate between a lower surface of the anode region and a frontside surface of the substrate, the transverse channel region being lightly doped with majority carriers in a second concentration much lower than the first concentration;
- (d) a cathode region formed in the substrate along the frontside surface to a predetermined thickness in the substrate and being doped with majority carriers of the first type in a third concentration much higher than the second concentration;
- (e) gate control regions formed in the substrate along the frontside surface and adjacently confronting the cathode region and being doped with minority carriers in a predetermined high concentration and to a predetermined depth into the transverse channel region;
- the predetermined depth of each of the gate control regions in the substrate being at least as great as a distance between the two gate control regions and including the cathode region;
- and
- (f) a frontside cathode electrode conductor layer formed along the topside surface of the substrate and electrically interconnecting the cathode region and the two gate control regions;
- the semiconductor structure being so arranged to create a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and the cathode electrode.
A two-terminal short channel barrier controlled transient voltage suppression (TVS) diode having conductivity modulation for forward conduction at a predetermined clamping voltage level above a level associated with conventional semiconductor material doping level and junction type of a semiconductor diode, and comprising a semiconductor substrate including:
- (a) a backside anode electrode conductor layer formed along a back surface of the substrate;
- (b) an anode region extending to a predetermined depth in the substrate next to the anode electrode conductor layer and being highly doped with minority carriers in a first minority carrier concentration;
- (c) a transverse channel region extending in the substrate between a lower surface of the anode region and a frontside surface of the substrate, the transverse channel region being lightly doped with majority carriers in a first majority carrier concentration;
- (d) a cathode region formed in the substrate along the frontside surface to a predetermined depth in the substrate and being doped with majority carriers of the first type in a second majority concentration much higher than the first majority carrier concentration;
- (e) two gate control regions formed in the substrate along the frontside surface and adjacently confronting the cathode region and being doped with minority carriers in a predetermined high second minority carrier concentration and to a predetermined depth into the transverse channel region;
- the predetermined depth of each of the gate control regions in the substrate being at least as great as a distance between the two gate control regions and including the cathode region;
- and
- (f) a frontside cathode electrode conductor layer formed along the frontside surface of the substrate and electrically interconnecting the cathode region and the two gate control regions;
- the semiconductor structure being so arranged to create a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and the cathode electrode, and the anode region providing conductivity modulation by injection of minority carriers into the channel region during conduction of the semiconductor structure at and above the predetermined clamping voltage.
A method for making a two-terminal short channel barrier controlled transient voltage suppression (TVS) diode having forward conduction at a predetermined clamping voltage level above a level associated with conventional semiconductor material doping level and junction type of a semiconductor diode, and being arranged to create a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage level applied between a anode electrode and a cathode electrode of the TVS diode, comprising the steps of
- (a) providing a semiconductor substrate doped with predetermined carriers in a first concentration, the predetermined carriers being one of majority carriers and minority carriers;
- (b) forming a transverse channel region on the substrate by deposition of an epitaxial layer, the transverse channel region of the epitaxial layer being lightly doped with majority carriers in a second concentration much lower than the first concentration;
- (c) forming a cathode region along a frontside surface of the transverse channel region to a predetermined thickness, the cathode region being doped with majority carriers of the first type in a third concentration much higher than the second concentration;
- (d) forming gate control regions along the frontside surface and adjacently confronting the cathode region, the gate control regions being doped with minority carriers in a predetermined high concentration and to a predetermined depth into the transverse channel region;
- (e) forming a backside anode electrode conductor along a backside of the substrate;
- and
- (f) forming a frontside cathode electrode conductor layer along the topside surface of the substrate so as electrically to interconnect the cathode region and the two gate control regions.
Dependencies are inferred from the claim text.