Method of manufacturing a semiconductor device with a silicon-germanium gate electrode
AssigneeSharp Kabushiki Kaisha
InventorAkiyoshi Mutou
Life of this patent
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Abstract
A SiO2 film serving as a gate dielectric film is formed on a silicon substrate. A seed Si film is formed on the gate dielectric film. A thin SiGe film of a thickness of 50 nm or less is formed on the seed Si film at a temperature between 450° C. and 494° C., and a thin cap Si film of a thickness of 0.5 nm to 5 nm is continuously formed on the thin SiGe film at the same temperature.
Claims13
1-8. (canceled)
A method for manufacturing a semiconductor device comprising:
- forming a gate dielectric film on a substrate;
- forming a seed Si film on the gate dielectric film;
- forming a SiGe film on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a cap Si film with a thickness of 0.5 nm to 5 nm on the SiGe film at the same temperature at which the SiGe film is formed;
- patterning the cap Si film, the SiGe film, and the seed Si film to form a gate electrode;
- and
- forming source-drain regions the substrate by ion implantation using the gate electrode as a mask.
A method for manufacturing a semiconductor device comprising:
- forming a gate dielectric film on a substrate;
- forming a seed Si film on the gate dielectric film;
- forming a SiGe film on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a cap Si film with a thickness of 0.5 nm to 5 nm on the SiGe film at the same temperature at which the SiGe film is formed;
- forming an upper Si film on the cap Si film at a temperature higher than the temperature of forming the SiGe film;
- patterning the upper Si film, the cap Si film, the SiGe film, and the seed Si film to form a gate electrode;
- and
- forming source-drain regions in the substrate by ion implantation using the gate electrode as a mask.
A method for manufacturing a semiconductor device comprising:
- forming a gate dielectric film on a substrate;
- forming a seed Si film on the gate dielectric film;
- forming a SiGe film on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming cap Si film with a thickness of 0.5 nm to 5 nm on the SiGe film at the same temperature at which the SiGe film is formed;
- forming an upper Si film on the cap Si film at a temperature higher than the temperature at which the SiGe film is formed;
- patterning the upper Si film, the cap Si film, the SiGe film, and the seed Si film to form a gate electrode;
- forming extension regions in an upper layer of the substrate by ion implantation using the gate electrode as a mask;
- forming sidewalls covering sides of the gate electrode after forming the extension regions;
- forming source- and drain regions in the substrate by ion implantation using the gate electrode and the sidewalls as a mask;
- and
- forming silicide layers in upper portions of the upper Si film and the source- and drain regions using a saliciding technique.
A method for manufacturing a semiconductor device comprising:
- forming a gate dielectric film on a substrate;
- forming a seed Si film on the gate dielectric film;
- forming a first SiGe layer on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a first cap Si film with a thickness of 0.5 nm to 5 nm on the first SiGe layer at the same temperature at which the first SiGe layer is formed, and continuously forming a second SiGe layer on the first cap Si layer at the same temperature at which the first SiGe layer is formed, and continuously forming a second cap Si film with a thickness of 0.5 nm to 5 nm on the second SiGe layer at the same temperature at which the first SiGe layer is formed;
- patterning the second cap Si film, the second SiGe layer, the first cap Si film, the first SiGe layer and the seed Si film to form a gate electrode;
- and
- forming source- and drain regions in the substrate by ion implantation, using the gate electrode as a mask.
A method for manufacturing a semiconductor device comprising:
- forming a gate dielectric film on a substrate;
- forming a seed Si film on the gate dielectric film;
- forming a first SiGe layer on the seed Si film at a temperature between 450° C. and 494° C., and continuously forming a first cap Si film with a thickness of 0.5 nm to 5 nm on the first SiGe layer at the same temperature at which the first SiGe layer is formed, and continuously forming a second SiGe layer on the first cap Si layer at the same temperature at which the first SiGe layer is formed, and continuously forming a second cap Si film with a thickness of 0.5 nm to 5 nm on the second SiGe layer at the same temperature at which the first SiGe layer is formed;
- forming an upper Si film on the second cap Si film at a temperature higher than the temperature at which the first SiGe layer is formed;
- patterning the upper Si film, the second cap Si film, the second SiGe layer, the first cap Si film, the first SiGe layer and the seed Si film to form a gate electrode;
- forming extension regions in the substrate by ion implantation, using the gate electrode as a mask;
- forming sidewalls covering sides of the gate electrode after forming the extension regions;
- forming source- and drain regions in the substrate by ion implantation, using the gate electrode and the sidewalls as a mask;
- and
- forming silicide layers in upper portions of the upper Si film and the source- and drain regions using saliciding technique.
Dependencies are inferred from the claim text.