MOSFET device with localized stressor

A transistor formed on a substrate, the transistor comprising:

• a gate electrode formed on a gate dielectric layer, wherein the gate dielectric layer is located on the substrate;
• spacers on the substrate alongside the gate electrode;
• source/drain regions formed in the substrate on either side of the gate electrode;
• and
• a high-stress film formed over the source/drain regions, the high-stress film not extending on top of the gate electrode, wherein the high-stress film comprises a plurality of films.

A transistor formed on a substrate, the transistor comprising:

• a gate electrode formed on a gate dielectric layer, wherein the gate dielectric layer is located on the substrate;
• spacers on the substrate alongside the gate electrode;
• a source region in the substrate on a first side of the gate electrode;
• a drain region in the substrate on a second side of the gate electrode;
• and
• a film over the source and drain regions, wherein the film does not extend over the gate electrode and imparts stress along a source-to-drain direction, wherein the film comprises a plurality of films.

A transistor formed on a substrate, the transistor comprising:

• a gate electrode formed on a gate dielectric layer, wherein the gate dielectric layer is located on the substrate;
• spacers on the substrate alongside the gate electrode;
• source/drain regions formed in the substrate on either side of the gate electrode;
• and
• a high-stress film formed over the source/drain regions, the high-stress film not extending on top of the gate electrode, and a contact etch-stop layer formed over the transistor and the high-stress film.

A transistor formed on a substrate, the transistor comprising:

• a gate electrode formed on a gate dielectric layer, wherein the gate dielectric layer is located on the substrate;
• spacers on the substrate alongside the gate electrode;
• a source region in the substrate on a first side of the gate electrode;
• a drain region in the substrate on a second side of the gate electrode;
• and
• a film over the source and drain regions, wherein the film does not extend over the gate electrode and imparts stress along a source-to-drain direction and a contact etch-stop layer over the transistor and the film.