Chemical mechanical polishing process for manufacturing semiconductor devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWen-Chih Chiou, Ying-Ho Chen, Chen-Hua Yu
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Abstract
A chemical-mechanical polishing (CMP) process for the manufacturing of semiconductor devices is disclosed. The process includes removing a first portion of a first layer of interconnect materials using a first platen and a first slurry, removing a second portion of the first layer using a second platen and a second slurry, removing a first portion of a second layer of the interconnect materials using a second platen and a third slurry, and removing a second portion of the second layer using a third platen and a fourth slurry.
Claims24
A method for forming an interconnect structure of a semiconductor device utilizing a chemical-mechanical polishing (CMP) processing, comprising:
- removing a first portion of a first layer of interconnect materials using a first platen and a first slurry;
- removing a second portion of the first layer using a second platen and a second slurry;
- removing a first portion of a second layer of the interconnect materials using a second platen and a third slurry;
- and
- removing a second portion of the second layer using a third platen and a fourth slurry.
A method for forming an interconnect structure of a semiconductor device using a multi-platen chemical mechanical polishing (CMP) process, comprising:
- removing a first portion of a copper (Cu) layer of interconnect materials using a first platen and a first slurry;
- removing a second portion of the Cu layer using a second platen and a second slurry;
- removing a first portion of a tantalum (Ta) layer of the interconnect materials using a second platen and a third slurry wherein the second and third slurries are identical, wherein the thickness of the first portion is between approximately 10 Angstroms to approximately 300 Angstroms;
- and
- removing a second portion of the Ta layer using a third platen and a fourth slurry.
A semiconductor device, comprising interconnect materials over a substrate for forming an interconnect structure of the semiconductor device by a chemical-mechanical polishing (CMP) process, wherein the interconnect materials comprise:
- a copper layer wherein a first portion of the copper layer is removed using a first platen and a first slurry, wherein a second portion of the copper layer is removed using a second platen and a second slurry;
- a tantalum barrier layer in contact with the copper layer wherein a first portion of the tantalum barrier layer is removed using the second platen and a third slurry, wherein the a second portion of the tantalum barrier layer is removed using a third platen and a fourth slurry.
Dependencies are inferred from the claim text.