Method of forming relatively continuous silicide layers for semiconductor devices

A method of forming a metal suicide layer on a transistor that includes a gate electrode, a first source/drain region and a second source/drain region, the method comprising:

• forming a metal layer on the gate electrode, the first source/drain region and the second source/drain region;
• transforming the metal layer into a first metal silicide layer by a silicidation process in which metal in the metal layer reacts with silicon (Si) in the gate electrode and in the first and second source/drain regions, wherein the first metal silicide layer includes one or more discontinuous portions in which the gate electrode, the first source/drain region and/or the second source/drain region is exposed;
• forming an etch stop layer on the first metal silicide layer;
• forming an insulation layer on the etch stop layer;
• forming an insulation layer pattern through which the etch stop layer is exposed by partially removing the insulation layer;
• partially etching the etch stop layer to form an etch stop layer pattern through which the first metal silicide layer is exposed along the gate electrode;
• and
• forming a second metal silicide layer by selectively depositing a conductive material onto the portions of the gate electrode exposed through the one or more discontinuous portions of the first metal silicide layer.

A method of forming a transistor, the method comprising:

• forming a gate electrode on a silicon layer;
• forming source/drain regions in the silicon layer;
• forming a first metal silicide layer on the gate electrode, wherein the first metal silicide layer includes one or more discontinuous portions;
• and
• selectively depositing a supplemental metal into at least some of the discontinuous portions of the first metal silicide layer.