Integration of multiple gate dielectrics by surface protection
AssigneeFreescale Semiconductor, Inc.
InventorsSangwoo Lim, Laegu Kang, Geoffrey Yeap
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AssigneeFreescale Semiconductor, Inc.
InventorsSangwoo Lim, Laegu Kang, Geoffrey Yeap
Estimating the term…
A multiple gate oxidation process is provided. The process comprises the steps of (a) providing a silicon substrate (203) having a sacrificial oxide layer (207) thereon; (b) depositing and patterning a first layer of photoresist (209) on the sacrificial oxide layer, thereby forming a first region in which the sacrificial oxide layer is exposed; (c) etching the exposed sacrificial oxide layer within the first region, thereby forming a first etched region; (d) growing a first oxide layer (211) within the first etched region; (e) depositing and patterning a second layer of photoresist (213) on the sacrificial oxide layer and first oxide layer, thereby forming a second region in which the sacrificial oxide layer is exposed; (f) etching the exposed sacrificial oxide layer within the second region, thereby forming a second etched region; and (g) growing a second oxide layer (215) within the second etched region.
A method for forming a multi gate oxide structure, comprising the steps of:
A method for forming a multi gate oxide structure, comprising the steps of:
A multi gate oxide structure, comprising:
A multi gate oxide structure, comprising:
Dependencies are inferred from the claim text.