Thin film transistor and manufacturing method thereof
AssigneeLG. Philips LCD Co., Ltd.
InventorChang Han
Life of this patent
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Abstract
A method for manufacturing a thin film transistor is provided. In the method, a gate electrode is formed on a substrate. A crystalline gate insulating layer is formed on an entire surface of the substrate having the gate electrode formed thereon. A microcrystalline silicon layer and a doped amorphous silicon layer are sequentially formed on the crystalline gate insulating layer. A metal layer is deposited on the substrate including the crystalline gate insulating layer, the microcrystalline silicon layer and the doped amorphous silicon layer. Source and drain electrodes, an ohmic contact layer and an active layer are formed by etching predetermined portions of the metal layer and the doped amorphous silicon layer to expose a predetermined portion of the microcrystalline silicon layer.
Claims25
A method for manufacturing a thin film transistor, the method comprising:
- forming a gate electrode on a substrate;
- forming a crystalline gate insulating layer on a surface of the substrate having the gate electrode formed thereon;
- sequentially forming a silicon layer and a doped silicon layer on the crystalline gate insulating layer;
- depositing a metal layer on the substrate including the crystalline gate insulating layer, the silicon layer, and the doped silicon layer;
- and
- exposing a predetermined portion of the silicon layer to form a source electrode, a drain electrode, an ohmic contact layer and an active layer.
A thin film transistor comprising:
- a gate electrode disposed on a substrate;
- a crystalline gate insulating layer disposed on a surface of the substrate having the gate electrode disposed thereon;
- a silicon layer disposed on the crystalline gate insulating layer;
- a source electrode and a drain electrode disposed above the crystalline gate insulating layer.
A thin film transistor comprising:
- a gate electrode disposed on a substrate;
- a crystalline gate insulating layer disposed on a surface of the substrate having the gate electrode disposed thereon;
- a silicon layer disposed on the crystalline gate insulating layer;
- ohmic contact layers disposed respectively on both upper sides of the silicon layer;
- and
- a source electrode and a drain electrode disposed respectively on regions including the ohmic contact layers.
Dependencies are inferred from the claim text.