Format control circuit and semiconductor test device

Abstract

There is provided a semiconductor test apparatus which assuredly detects an opened edge only which affects a test pattern and truly requires an error warning or the like. This semiconductor test apparatus comprises: a real time selector 40 which receives a plurality of sets of waveform data output from a waveform memory 30, receives a plurality of sets of timing data output from a timing generator 20, selects and outputs predetermined waveform data and timing data, opens a continuous following edge in order to output an open signal when an edge with the same polarity which is continuous in an interval shorter than a proximity limit time exists in edges of the waveform data; and an open detector 50 which receives the waveform data, the timing data and the open signal output from the real time selector 40, and outputs fail signal when an edge with a polarity reverse to that of an opened edge exists in the proximity limit time before the opened edge.

Dependencies are inferred from the claim text.