GPS receiver having RF front end power management and simultaneous baseband searching of frequency and code chip offset

A GPS receiver, comprising:

• an RF front end including an IF stage and an analog-to-digital converter;
• a digital baseband processor coupled to receive a digital baseband signal from the analog-to-digital converter of the RF front end;
• and
• control circuitry coupled to the RF front end and the digital baseband processor;
• wherein a frequency of the IF stage is operable to be increased or decreased responsive to the control circuitry, a sample rate of the analog-to-digital converter is operable to be increased or decreased responsive to the control circuitry, and a bandwidth of the RF front end is operable to be increased or decreased responsive to the control circuitry.

A method of operating a GPS receiver having a front end, and a digital baseband processor, the front end including an IF stage and an ADC, the method comprising:

• setting, if in a signal tracking mode, a front end bandwidth to a first value, an IF frequency to a second value, and an ADC sample rate to a third value;
• setting, if in a signal acquisition mode, a front end bandwidth to a fourth value, an IF frequency to a fifth value, and an ADC sample rate to a sixth value;
• and
• setting, if in an ephemeris download mode, a front end bandwidth to a seventh value, an IF frequency to an eighth value, and an ADC sample rate to a ninth value.

A method of operating a GPS receiver, comprising:

• receiving an incoming signal;
• mixing the received signal down to an intermediate frequency signal;
• sampling the intermediate frequency signal with an analog-to-digital converter to produce a digitized signal;
• programming each one of a plurality of baseband mixers to multiply the digitized signal by one of a plurality of digitally synthesized signals to produce an output signal;
• integrating each baseband mixer output signal for a period equal to at least a code chip period;
• operating, during the code chip period, a code generator;
• and
• subsequent to the period equal to at least a chip code period, determining whether a peak has been found;
• wherein searching for a carrier frequency shift and a code chip offset occur simultaneously.