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US 2006/0067108 A1Published application
Bitcell having a unity beta ratio
AssigneeIntel Corporation
InventorRabiul Islam
Life of this patent
Estimating the term…
Abstract
In one embodiment, the present invention includes a memory device formed of a latch device that includes a pair of pull-up transistors and a pair of pull-down transistors to store data, and a pair of wordline transistors coupled between a wordline and the latch device. The pull-down transistors and the wordline transistors may be of substantially the same size and thus may have a unity beta ratio.
Claims25
An apparatus comprising:
- a latch device to store data, the latch device comprising a pair of pull-up transistors and a pair of pull-down transistors;
- and
- a pair of wordline transistors coupled between a wordline and the latch device, wherein a beta of the pull-down transistors is substantially equal to a beta of the wordline transistors.
An apparatus comprising:
- a bias circuit to provide a first voltage to a wordline coupled to a plurality of access devices which are coupled to a storage cell;
- and
- a supply line to provide a supply voltage to the storage cell, the supply voltage greater than the first voltage.
A method comprising:
- providing a supply voltage to a bitcell formed of a latch device;
- and
- providing an access voltage to a pair of access devices coupled to the latch device to select the bitcell, wherein the access voltage is less than the supply voltage.
A system comprising:
- a bias circuit to provide a first voltage to a wordline coupled to a plurality of access devices which are coupled to a storage cell;
- a supply line to provide a supply voltage to the storage cell, the supply voltage greater than the first voltage;
- and
- a wireless interface coupled to the bias circuit.
1 more element
An article comprising a machine-accessible storage medium containing instructions that if executed enable a system to:
- provide a supply voltage to a bitcell formed of a latch device;
- and
- provide an access voltage to a pair of access devices coupled to the latch device to select the bitcell, wherein the access voltage is less than the supply voltage.
Dependencies are inferred from the claim text.