Video signal processor circuit and television receiver

A television receiver comprising:

• a video signal generator circuit which generates a video signal including a luminance signal and a chrominance signal;
• a contrast adjuster circuit which receives the luminance signal compatible with a plurality of pixels from the video signal generator circuit and which adjusts and outputs a contrast of the luminance signal, a matrix circuit which receives the chrominance signal from the video signal generator circuit, receives the luminance signal whose contrast has been adjusted from the contrast adjuster circuit, and outputs an RGB signal on the basis of both the color and luminance signals;
• a display device which displays a picture;
• and
• a back-end processor which receives the RGB signal from the matrix circuit, carries out signal processing adapted to the display device, and supplies the processed signal to the display device, the contrast adjuster circuit including:
• a histogram generator circuit which receives the luminance signal compatible with a plurality of pixels, divides the luminance signal compatible with said plurality of pixels in a constant unit into a plurality of signal level regions for each constant signal level range, and detects a rate of pixels included in each signal level to all the pixels in the constant unit to generate a histogram;
• a correction coefficient storage circuit which stores a correction coefficient after the correction coefficient has been set;
• a computing circuit which receives the histogram and the correction coefficient, calculates a correction value with respect to a signal level in said each signal level region in response to the histogram and the correction coefficient, and adjusts input and output characteristics of the luminance signal on the basis of the correction value;
• and
• a correcting circuit which receives the luminance signal, the correcting circuit being connected to the computing circuit, and gamma-correcting and outputting the luminance signal in accordance with the input and output characteristics adjusted by the computing circuit.