Method for burn-in test and measurement program for burn-in test
AssigneeNEC Electronics Corporation
InventorSuguru Sasaki
Life of this patent
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Abstract
A method for a burn-in test includes steps (a) and (b). In the step (a), an operation test of a first semiconductor device is executed through first probes provided on a probe card. In the step (b), a stress is applied to a second semiconductor device through second probes provided on the probe card while the operation test is executed.
Claims14
A method for a burn-in test comprising:
- (a) executing an operation test of a first semiconductor device through first probes provided on a probe card;
- and
- (b) applying a stress to a second semiconductor device through second probes provided on said probe card while said operation test is executed.
A method for a wafer level burn-in test comprising:
- (a) executing an operation test of a first semiconductor device formed on a wafer;
- and
- (b) applying a stress to a second semiconductor device formed on said wafer while said operation test is executed.
A method for a burn-in test comprising:
- (a) executing an operation test of a first semiconductor device formed on a carrier tape;
- and
- (b) applying a stress to a second semiconductor device formed on said carrier tape while said operation test is executed.
A computer program product used for a method for a burn-in test, embodied on a computer-readable medium in a tester and comprising code that, when executed, causes a computer of said tester to perform the following:
- (a) executing an operation test of a first semiconductor device through first probes provided on a probe card;
- and
- (b) applying a stress to a second semiconductor device through second probes provided on said probe card while said operation test is executed.
Dependencies are inferred from the claim text.