Determining and analyzing integrated circuit yield and quality

A computer-implemented method, comprising:

• receiving information from processing test responses of integrated circuits, the information being indicative of integrated circuit failures observed during testing of the integrated circuits and potential defects that may have caused the integrated circuit failures;
• determining probabilities that the potential defects are actually causing the integrated circuit failures by analyzing the received information, the analyzing comprising iteratively solving a system of equations relating an estimated probability to an actual probability that a respective potential defect caused the associated integrated circuit failure;
• and
• reporting the determined probabilities.

A computer-implemented method, comprising:

• receiving information indicative of integrated circuit failures observed during testing of multiple integrated circuits and potential defects that may have caused the integrated circuit failures, the potential defects having been extracted and targeted for testing using extraction rules derived from design manufacturing rules;
• analyzing the information to determine one or more failure rates associated with one or more of the potential defects;
• and
• reporting the determined failure rates.