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US 2006/0065984 A1Published application
Package stress management
AssigneeIntel Corporation
InventorsJames Matayabas, Gudbjorg Oskarsdottir, Mitesh Patel
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Abstract
Numerous embodiments of an apparatus and method to stress and warpage of semiconductor packages are described. In one embodiment, a semiconductor die is disposed above a substrate. An encapsulating material is disposed above the substrate and semiconductor die, in which the encapsulating material has a combination of a low coefficient of thermal expansion material and a high coefficient of thermal expansion material.
Claims12
1-9. (canceled)
A method, comprising:
- coupling a semiconductor die above a substrate;
- and
- disposing an encapsulating material over the die and substrate, the encapsulating material having a combination of a low coefficient of thermal expansion material and a high coefficient of thermal expansion material.
A method, comprising:
- disposing a semiconductor die above a substrate;
- silk printing a first encapsulating layer above the semiconductor die and substrate, the first encapsulating layer having coefficient of thermal expansion of about 8 to about 10 parts per million per degree Celsius;
- and
- silk printing a second encapsulating layer above the first encapsulating layer, the second encapsulating layer having a coefficient of thermal expansion of about 15 to about 30 parts per million per degree Celsius.
1 more element
Dependencies are inferred from the claim text.