Circuit to improve ESD performance made by fully silicided process
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShao-Chang Huang, Yu-Hung Chu
Life of this patent
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Abstract
An electrostatic discharge (ESD) protection circuit is provided. The circuit is coupled between a first and a second node for dissipating an ESD current. The circuit comprises a first transistor formed on a substrate with its gate and a first diffusion region coupled to the first node for receiving the ESD current, and a second transistor coupled in series with the first transistor at its second diffusion region and with the second transistor's gate coupled to the second node for dissipating the ESD current therethrough, wherein the first transistor provides a N/P junction close to its diffusion regions for directing the ESD current through a parasitic transistor in the substrate and the second transistor.
Claims28
An electro-static discharge (ESD) protection circuit coupled between a first and a second node for dissipating an ESD current, the circuit comprising:
- at least one thin oxide transistor formed on a substrate and coupled to the first node for receiving the ESD current;
- and
- at least one thick oxide transistor in series with the thin oxide transistor and with its gate coupled to the second node for dissipating the ESD current therethrough,
- wherein the thin oxide transistor provides a N/P junction close to one of its diffusion regions for directing the ESD current through a parasitic transistor in the substrate and the thick oxide transistor.
An electro-static discharge (ESD) protection circuit coupled between a first and a second node for dissipating an ESD current, the circuit comprising:
- a first transistor formed on a substrate with its gate and a first diffusion region coupled to the first node for receiving the ESD current;
- and
- a second transistor coupled in series with the first transistor at its second diffusion region and with the second transistor's gate coupled to the second node for dissipating the ESD current therethrough,
- wherein the first transistor provides a N/P junction close to its diffusion regions for directing the ESD current through a parasitic transistor in the substrate and the second transistor.
An electrostatic discharge (ESD) protection circuit coupled between a circuit pad and ground for dissipating an ESD current, the circuit comprising:
- a first transistor formed on a substrate with a first diffusion region coupled to the circuit pad for receiving the ESD current;
- and
- a second transistor coupled in series with the first transistor at its second diffusion region and with the second transistor's gate and one of its diffusion regions coupled to ground if the first and second transistors are NMOS transistors or a power supply if the first and second transistors are PMOS transistors for dissipating the ESD current therethrough,
- wherein the first transistor provides a N/P junction for directing the ESD current through a parasitic transistor in the substrate and the second transistor, and
- wherein a gate of the first transistor is either floating or coupled to the circuit pad.
Dependencies are inferred from the claim text.