Back to results
US 2006/0053355 A1Published application
Semiconductor integrated circuit device
AssigneeNEC Electronics Corporation
InventorHideharu Ozaki
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit device has: a plurality of macro circuits; and a plurality of decoders configured to supply a test enable signal to the plurality of macro circuits. Each decoder is provided with respect to a corresponding predetermined number of macro circuits of the plurality of macro circuits.
Claims12
A semiconductor integrated circuit device comprising:
- a plurality of macro circuits;
- and
- a plurality of decoders configured to supply a test enable signal to said plurality of macro circuits,
- wherein each of said plurality of decoders is provided with respect to a corresponding predetermined number of macro circuits of said plurality of macro circuits.
1 more element
A semiconductor integrated circuit device comprising:
- a plurality of unit circuits;
- and
- a test macro select pin connected to said plurality of unit circuits,
- wherein each of said plurality of unit circuits includes:
- a decoder connected to said test macro select pin;
- and
- a plurality of macro circuits connected to said decoder,
- wherein said decoder receives from said test macro select pin a select signal specifying a test target of said plurality of macro circuits, and supplies a test enable signal to said test target based on said select signal.
5 more elements
A structured ASIC comprising:
- a base layer;
- and
- a plurality of unit circuits formed in said base layer,
- wherein each of said plurality of unit circuits includes:
- a decoder;
- and
- a plurality of macro circuits connected to said decoder,
- wherein said decoder supplies a test enable signal to any of said plurality of macro circuits.
5 more elements
Dependencies are inferred from the claim text.