Information storage element, manufacturing method thereof, and memory array

A method of manufacturing an information memory device having a semiconductor transistor which is provided with a semiconductor substrate, a source, a drain, a gate, and a gate insulation film, wherein said gate insulation film has a cavity, and in this cavity, there exists a floating gate having two stable deflection states, one of which is a stable state deflecting toward a channel side of said transistor, and the other of which is a stable state deflecting toward the gate side, characterized in that, the method of manufacturing said gate insulation film comprises the steps of:

• forming a first silicon oxide layer on the semiconductor substrate by high temperature process;
• forming a caving region for the cavity at the region corresponding to a channel of the transistor by etching said first silicon oxide layer;
• leaving a silicon nitride layer in said caving region by forming a first silicon nitride layer on said surface and etching said silicon nitride layer;
• forming a floating gate layer by low temperature process the temperature of which is lower than the temperature of said high temperature process;
• leaving a silicon nitride layer on the region corresponding to said cavity region by forming a second silicon nitride layer on said surface and etching said second silicon nitride layer;
• forming a second silicon oxide layer on said surface by said high temperature process and etching a multi layer structure comprising said second silicon oxide layer, said floating gate layer, and said first silicon oxide layer into a shape of a gate insulation film;
• forming said cavity by removing said first and second silicon nitride layer from said structure etched into the shape of gate insulation film;
• and
• deflecting said floating gate by annealing said structure.