Mute circuit

Abstract

The invention is to provide a mute circuit capable of surely muting various noises generated in a signal output line with a simple circuit configuration and a signal output device provided with the same. A resistor and a capacitor are serially connected to each other on the signal output line of an analog signal outputted from a D/A converter, and a predetermined voltage is impressed thereon. The voltage is set to a level which is higher than a reference voltage to be supplied to the signal output line. In cases where noises are generated on the signal output line owing to variation of a voltage having an inverted polarity relative to the reference voltage, the variation is offset by the discharge of the capacitor while in cases where the noises are generated owing to the variation of a voltage having the same polarity, a resistance of the resistor is set to absorb the voltage variation.

Dependencies are inferred from the claim text.