Bitline governed approach for program control of non-volatile memory

A method of programming non-volatile storage, comprising:

• applying an inhibit voltage to a source/drain line for a non-volatile storage element;
• applying a first program voltage to a gate line for said non-volatile storage element while applying said inhibit voltage to said source/drain line;
• reducing said first program voltage to said gate line to a non-zero value while applying said inhibit voltage to said source/drain line;
• applying a programming signal to said source/drain line while said first program voltage is reduced;
• and
• raising said first program voltage to said gate line while applying said programming signal to said source/drain line.

A method of programming a set of non-volatile storage elements, comprising:

• applying a program voltage to a word line for a subset of said non-volatile storage elements arranged on a plurality to NAND strings, said NAND strings are associated with bit lines;
• applying an inhibit condition as a bit line voltage for said bit lines;
• applying a program pulse to said word line, said program pulse has a magnitude;
• reducing said magnitude of said program pulse during said program pulse and while said inhibit condition is applied as said bit line voltage;
• determining which of said subset of said non-volatile storage elements are to be programmed;
• changing said bit line voltage for non-volatile storage elements that are to be programmed so that a program condition is applied as said bit line voltage, said changing said bit line voltage is performed while said magnitude of said program pulse is reduced;
• and
• increasing said magnitude of said program pulse after said changing said bit line voltage.