Thin film transistor array panel and method for manufacturing the same

A thin film transistor array panel, comprising:

• an insulating substrate;
• a gate line formed on the gate insulating substrate and having a gate electrode;
• a gate insulating layer formed on the gate line;
• a semiconductor formed on the gate insulating layer;
• a data line formed on the gate insulating layer and the semiconductor, the data line having a source electrode;
• a drain electrode formed on the gate insulating layer and the semiconductor, the drain electrode facing the source electrode with a predetermined gap;
• a passivation layer formed on the data line and the drain electrode, the passivation layer having a contact hole;
• and
• a pixel electrode formed on the passivation layer and connected to the drain electrode through the contact hole,
• wherein the data line and the drain electrode have a first layer of a Mo containing metal, a second layer of an Al containing metal, and a third layer of a Mo containing metal, and at least one of the first and third layers comprising a Mo-alloy including molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti).

A manufacturing method of a thin film transistor array panel, comprising:

• forming a gate line on an insulating substrate, the gate line having a first layer of an Al containing metal and a second layer of a Mo-alloy comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti), the gate line having a gate electrode;
• depositing a gate insulating layer, a semiconductor layer, and a ohmic contact layer on the gate line in sequence;
• patterning the semiconductor layer and the ohmic contact layer;
• forming a drain electrode and a data line having a source electrode on the gate insulating layer and the ohmic contact layer, the drain electrode facing the source electrode with a predetermined gap;
• forming a passivation layer having a contact hole exposing the source electrode on the data line and the drain electrode;
• and
• forming a pixel electrode connected to the drain electrode through the contact hole on the passivation layer.

A manufacturing method of a thin film transistor array panel, comprising:

• forming a gate line on an insulating substrate;
• depositing a gate insulating layer, a semiconductor layer, and a ohmic contact layer on the gate line in sequence;
• patterning the semiconductor layer and the ohmic contact layer;
• forming a drain electrode and a data line having a source electrode on the gate insulating layer and the ohmic contact layer, the data line and the drain electrode having a first layer of a Mo containing metal, a second layer of an Al containing metal, and a third layer of a Mo containing metal, at least one of the first and third layers comprising a Mo-alloy including molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti);
• forming a passivation layer having a contact hole exposing the source electrode on the data line and the drain electrode;
• and
• forming a pixel electrode connected to the drain electrode through the contact hole on the passivation layer.

A liquid crystal display, comprising:

• a thin film transistor array panel, comprising:
• a gate insulating substrate;
• a gate line formed on the gate insulating substrate and having a gate electrode;
• a gate insulating layer formed on the gate line;
• a semiconductor formed on the gate insulating layer;
• a data line formed on the gate insulating layer and the semiconductor, the data line having a source electrode;
• a drain electrode formed on the gate insulating layer and the semiconductor, the drain electrode facing the source electrode with a predetermined gap;
• a passivation layer formed on the data line and the drain electrode, the passivation layer having a contact hole;
• and
• a pixel electrode formed on the passivation layer and connected to the drain electrode through the contact hole,
• wherein the data line and the drain electrode have a first layer of a Mo containing metal, a second layer of an Al containing metal, and a third layer of a Mo containing metal, and
• wherein at least one of the first and third layers include a Mo-alloy comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti),
• a color filter panel facing the thin film transistor array panel and having a common electrode;
• and
• a liquid crystal layer disposed between the thin film transistor array panel and the color filter panel.

An organic light emitting display, comprising:

• first and second semiconductor members including first and second intrinsic portions, respectively, and including one of amorphous silicon and polysilicon;
• a plurality of gate conductors that include a gate line including a first gate electrode overlapping the first intrinsic portion and a second gate electrode overlapping the second intrinsic portion;
• a gate insulating layer disposed between the first and the second semiconductor members and the gate conductors;
• a plurality of data conductors including a data line with a first source electrode connected to the first semiconductor member, a first drain electrode opposing the first source electrode with respect to the first intrinsic portion and connected to the first semiconductor member, a voltage transmission line including a second source electrode connected to the second semiconductor member, and a second drain electrode opposing the second source electrode with respect to the second intrinsic portion and connected to the second semiconductor member;
• a pixel electrode connected to the second drain electrode;
• a partition having an opening exposing a predetermined portion of the pixel electrode;
• an auxiliary electrode formed on the partition and having a substantially similar planar shape as the partition;
• an organic light emitting member formed on the pixel electrode and disposed substantially within the partition opening;
• and
• a common electrode formed on the organic light emitting member and the auxiliary electrode,
• wherein the data conductors have a first layer of a Mo containing metal, a second layer of an Al containing metal, and a third layer of a Mo containing metal, and at least one of the first and third layers include a Mo-alloy comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti).