Memory module having memory chips protected from excessive heat
AssigneeInfineon Technologies AG
InventorPeter Poechmueller
Life of this patent
Estimating the term…
Abstract
The invention relates to a memory module having a printed circuit board; having one or more memory chips which are arranged in a first region of the printed circuit board and are contact-connected by the printed circuit board; having a buffer chip for driving the memory chips and for communicating with a system that is external to the memory module, the buffer chip being arranged in a second region of the printed circuit board and being contact-connected by the printed circuit board; wherein the first and second regions of the printed circuit board are essentially thermally decoupled from one another.
Claims29
A memory module, comprising
- a printed circuit board;
- one or more memory chips which are arranged in a first region of the printed circuit board and are connected with the printed circuit board;
- a buffer chip configured to drive the one or more memory chips and communicate with a system that is external to the memory module, wherein the buffer chip is arranged in a second region of the printed circuit board and wherein the buffer chip is connected to the printed circuit board;
- and
- an intermediate region located between the first region and the second region, wherein the intermediate region has a lower thermal conductivity than the first and second regions of the printed circuit board.
The memory module of claim 5, wherein the cooling element is soldered in the passages.
The memory module of claim 6, wherein the cooling element is in thermal contact with another printed circuit board to dissipate heat.
A method of forming a memory module, comprising:
- positioning a plurality of memory chips in a first region of a printed circuit board;
- positioning a buffer chip in a second region of the printed circuit board;
- and
- forming a plurality of unplated holes in an intermediate region between the first region and the second region, thereby reducing thermal conductivity between the fist region and the second region, wherein one or more conductive lines connecting the buffer chip to the plurality of memory chips are routed between the plurality of unplated holes in the intermediate region.
A memory device comprising:
- a printed circuit board having a first region and a second region, wherein a plurality of unplated holes are formed in an intermediate region between the first region and the second region, wherein the plurality of holes are positioned and configured to reduce thermal conduction between the first region and the second region;
- a buffer chip attached in the first region of the printed circuit board;
- a plurality of memory chips attached in the second region of the printed circuit board;
- and
- one or more conductive lines connecting the buffer chip to the plurality of memory chips, wherein the conductive lines are routed between the plurality of unplated holes.
A memory device comprising:
- means for supporting having a first region and a second region, wherein a plurality of unplated holes are formed in an intermediate region between the first region and the second region to reduce thermal conduction between the first region and the second region;
- means for buffering attached in the first region;
- means for storing attached in the second region;
- and
- means for conducting connecting the buffer chip to the means for storing, wherein the conductive lines are routed between the plurality of unplated holes.
A memory device comprising:
- a printed circuit board having a first region and a second region, and wherein one or more notches are formed in an intermediate region of the printed circuit board, wherein the one or more notches extend from an external edge of the printed circuit board in the intermediate region to an internal edge of the printed circuit board within the intermediate region;
- a buffer chip attached in the first region of the printed circuit board;
- and
- a plurality of memory chips attached in the second region of the printed circuit board.
A memory device comprising:
- a printed circuit board having a first region and a second region;
- a buffer chip attached in the first region of the printed circuit board;
- a plurality of memory chips attached in the second region of the printed circuit board;
- and
- a supply conductor surface in the first and second region of the printed circuit board, wherein the thermal conductivity of the supply conductor surface in an intermediate region located between the first and second region is less than the thermal conductivity of the supply conductor surface in the first and second region.
Dependencies are inferred from the claim text.