Power semiconductor and method of fabrication

A power semiconductor, the semiconductor comprising:

• a layer of silicon within which a power device is formed, said power device having electrical contact regions and a drift region therebetween;
• a silicon substrate;
• a first insulating layer between said layer of silicon including said power device and said semiconductor substrate;
• and
• wherein said power device is inverted such that said contact regions of said device face said substrate.

A power semiconductor, the semiconductor comprising:

• a layer of silicon within which a power device is formed;
• a silicon substrate;
• a first ins lating layer between said layer of silicon including said power device ad said semiconductor substrate;
• and
• a second insulating layer over said layer of silicon including said power device and on an opposite side of said power device to said first layer, and wherein said second insulating layer has substantially flat and parallel upper and lower surfaces.

A lateral semiconductor-on-insulator device comprising:

• a semiconductor substrate;
• an insulating layer on said semiconductor substrate;
• and
• a lateral semiconductor device on said insulator;
• said lateral semiconductor device having:
• a first region of a first conductivity type;
• a second region of a second conductivity type laterally spaced apart from said first region;
• and
• a drift region extending in a lateral direction between said first region and said second region;
• and
• at least one electrode connection to one of said first and second regions made to a surface of said device towards said insulating layer.

A lateral semiconductor-on-insulator device comprising:

• a semiconductor substrate;
• an insulating layer on said semiconductor substrate;
• and
• a lateral semiconductor device on said insulator;
• said lateral semiconductor device having:
• a first region of a first conductivity type;
• a second region of a second conductivity type laterally spaced apart from said first region;
• and
• a drift region extending in a lateral direction between said first region and said second region;
• and
• at least one metallisation layer between said drift region and said substrate.

A method of fabricating a power semiconductor, the method comprising:

• forming a semiconductor device on a semiconductor-on-insulator (SOI) substrate, said SOI substrate comprising a first substrate, an intermediate insulating layer and a semiconductor layer;
• forming one or more at least partially insulating layers over said semiconductor device;
• attaching a second substrate on top of said one or more at least partially insulating layers;
• and
• removing said first substrate.