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US 2006/0041766 A1Published application
Methods of clock throttling in an integrated circuit
AssigneeIntel Corporation
InventorMitsuhiro Adachi
Life of this patent
Estimating the term…
Abstract
Thermal throttling control to safely throttle clocks OFF and ON in an integrated circuit. Digital thermal throttling control is provided to gradually throttle a clock's frequency from ON to OFF and from OFF to ON. The gradual throttling can minimize an instantaneous current rise that would otherwise occur with a rapid shut OFF and a rapid turn ON of a clock. Included are methods and apparatus for digital thermal throttle control in an integrated circuit.
Claims26
1-21. (canceled)
A method comprising:
- periodically determining a total level of switching activity in an integrated circuit to form a measure of global functional activity;
- comparing the measure of global functional activity with a predetermined limit of activity;
- if the measure of global functional activity meets or exceeds the predetermined limit of activity then
- gradually reducing a first frequency of clocking of circuitry in the integrated circuit to zero to stop the clocking of circuitry in the integrated circuit,
- waiting a first predetermined time after stopping the clocking of circuitry in the integrated circuit, and
- starting the clocking of circuitry in the integrated circuit at a second frequency less than the first frequency;
- and,
- if the measure of global functional activity does not meet or exceed the predetermined limit of activity, then repeating the periodically determining and the comparing.
5 more elements
A method comprising:
- generating a substantially instantaneous measure of global functional activity in an integrated circuit by summing levels of switching activity therein;
- determining if a predetermined limit of activity has been met or exceeded by the substantially instantaneous measure of global functional activity;
- if the predetermined limit of activity has been met or exceeded by the substantially instantaneous measure of global functional activity, then
- gradually reducing a first frequency of a clock to zero to stop clocking circuitry,
- waiting a first predetermined time after gradually reducing the first frequency of the clock to zero, and
- starting the clock at a second frequency less than the first frequency to start clocking circuitry;
- and if the predetermined limit of activity has not been met nor exceeded by the substantially instantaneous measure of global functional activity, then
- repeating the generating and the determining.
5 more elements
A method comprising:
- quantifying global functional activity in an integrated circuit by summing levels of local switching activity therein to generate a direct measure of global functional activity;
- determining if a predetermined limit of activity has been met or exceeded by the direct measure of global functional activity;
- if the predetermined limit of activity has been met or exceeded by the direct measure of global functional activity, then
- gradually reducing a high frequency of clocking of circuitry to zero to stop the clocking of circuitry,
- waiting a first predetermined time after stopping the clocking of circuitry, and
- starting the clocking of circuitry at a low frequency;
- and if the predetermined limit has not been met nor exceeded by the direct measure of global functional activity, then
- repeating the quantifying and the determining.
5 more elements
A method comprising:
- receiving local functional activity levels from functional blocks in an integrated circuit;
- weighting the local functional activity levels to generate weighted local functional activity levels;
- and
- summing the weighted local functional activity levels together to generate a global functional activity level of the integrated circuit.
1 more element
Dependencies are inferred from the claim text.