US 2006/0041693 A1 · Asynchronous decoupler

Abstract

A decoupler that allows for asynchronous communication between two synchronous IP cores. The decoupler reduces or eliminates the need for distribution and balancing of the clock. More specifically, the decoupler provides the ability to decouple an IP core from the interconnect clock domain, thereby reducing the need for clock balancing. The decoupler is inserted between a source IP core and a target IP core, and may include two interfaces, one located near the source and another located near the target. Synchronous data messages are converted to asynchronous data messages for transmission across a physical connection. Once the asynchronous data message is received by the interface near the target or source, the data message is converted back to a synchronous message.

Claims19

Dependent claims

A method of communicating between a source IP core and a target IP core in an integrated circuit, comprising:

transmitting, from the source IP core, a synchronous data message which is dependent on a first clock;
converting the synchronous data message to an asynchronous data message, which is independent of the first clock;
transmitting the asynchronous data message in a manner that implements delay-insensitive coding;
converting the asynchronous data message back into a synchronous data message, which is dependent on a second clock associated with the target IP core;
and
transmitting the synchronous data message, which is dependent on the second clock, to the target IP core in a synchronous manner.

3 more elements

Dependencies are inferred from the claim text.

Asynchronous decoupler

Life of this patent

Asynchronous decoupler

Life of this patent

Abstract

Claims19