Methods and structures for preventing gate salicidation and for forming source and drain salicidation and for forming semiconductor device

A method of salicidizing a gate electrode, comprising:

• providing a substrate having a gate electrode thereon, spacers on sidewalls of the gate electrode, exposing a surface on or adjacent to a top portion of the gate electrode;
• forming a first dielectric layer above the spacers, covering the exposed surface of the gate electrode;
• salicidizing source and drain regions which are adjacent to the spacers without forming salicidation on the gate electrode while salicidizing the source and drain regions;
• forming a second dielectric layer covering the salicidized source and drain regions;
• removing a portion of the first dielectric layer so as to expose a top surface of the gate electrode;
• and
• salicidizing the gate electrode.

A structure for preventing salicidation on a gate structure, comprising:

• a substrate having a gate electrode thereon;
• spacers on sidewalls of the gate electrode, exposing a surface on or adjacent to a top portion of the gate electrode;
• and
• a dielectric layer above the spacers, covering the exposed surface of the gate electrode without covering a source or drain region of the substrate.

A semiconductor device, comprising:

• a substrate having an gate electrode thereon, the gate electrode substantially completely salicidized;
• spacers on sidewalls of the gate electrode, the spacers being higher than the gate electrode by a distance;
• and
• salicidized source and drain regions extending into the substrate, adjacent to the spacers.

A structure of source or drain salicidation, comprising:

• a substrate having a gate electrode thereon, the gate electrode substantially completely salicidized;
• spacers on sidewalls of the gate electrode, the spacers having flat top portions;
• and
• salicidized source and drain regions extending into the substrate, adjacent to the spacers.