Register file apparatus and method incorporating read-after-write blocking using detection cells

A register file array, comprising:

• a plurality of storage cells for storing bit values and arranged as logical rows and columns;
• at least one detection cell configured to change state in response to a write to a row of said plurality of storage cells;
• and
• a clock steering logic preventing read access to said row until a state of an output of said at least one detection cell has changed by detecting a state change of said at least one detection cell.

A register file array, comprising:

• a plurality of storage cells for storing bit values and arranged as logical rows and columns;
• at least one detection cell configured to change state in response to a write to a row of said plurality of storage cells, wherein said at least one detection cell is a scannable storage cell comprising a scan latch and a detection storage cell, wherein an inverted output of said scan latch is coupled to an input of said detection storage cell and an input of said scan latch is coupled to an output of said detection storage cell, and wherein a scan clock input of said scan latch is coupled to a write strobe of said register file array and responsive to a de-asserted state of said write strobe, whereby a state of said at least one detection cell is stored between writes;
• and
• a clock steering logic preventing read access to said row until a state of an output of said at least one detection cell has changed by detecting a state change of said at least one detection cell, wherein said clock steering logic is coupled to a detection output of said scan latch and said output of said detection storage cell, and wherein said preventing is maintained until said detection output of said scan latch and said output of said detection storage cell are at different logical values.