Magnetic random access memory with tape read line, fabricating method and circuit thereof

A MRAM with a tape read line, comprising:

• a plurality of top write word lines and a plurality of bottom write word lines to provide a write-in current channel for the MRAM;
• a plurality of MTJ's, each of which is formed on a corresponding bottom write word line by stacking in sequence, wherein the top write word line in the lower MTJ and the bottom write word line in the upper MTJ are shared;
• a plurality of tape read lines, each of which is formed on a corresponding MTJ to provide a write-out current channel for the MRAM;
• a plurality of lower electrodes, each of which is formed between a corresponding MTJ and a corresponding bottom write word line;
• a plurality of first plugs to connect the tape read lines;
• a plurality of second plugs to connect the lower electrodes;
• and
• a plurality of third plugs to connect the tape read lines and the lower electrodes.

A method for fabricating a MRAM with a tape read line, comprising the steps of:

• forming a bottom write word line;
• forming a MTJ on the bottom write word line;
• and
• forming a tape read line on the MTJ.

A method for fabricating a MRAM with a tape read line, comprising the steps of:

• forming a MRAM, including the steps of:
• forming a bottom write word line;
• forming a MTJ on the bottom write word line;
• and forming a tape read line and a connect pad on the MTJ;
• forming a top write word line on the MRAM;
• forming a first plug connected to the tape read line;
• forming a second plug connected to the connect pad;
• and
• forming another MRAM on the top write word line.

A method for fabricating a MRAM with a tape read line, comprising the steps of:

• forming a MRAM, including the steps of:
• forming a bottom write word line;
• forming a MTJ on the bottom write word line;
• and forming a tape read line and a connect pad on the MTJ;
• forming a top write word line on the MRAM;
• forming a plug connecting the tape read line and the connect pad;
• and
• forming another MRAM on the top write word line.

A MRAM circuit, comprising:

• a plurality of data lines;
• a plurality of top write word lines;
• a plurality of bottom write word lines, each of which is perpendicular to each of the top write word lines;
• a plurality of MRAM's arranged at the intersections of the plurality of top write word lines and the plurality of bottom write word lines;
• and
• a plurality of transistors provided at the intersections of the plurality of top write word lines and the plurality of bottom write word lines with their gates and drains respectively connected to the data lines and the MRAM's, wherein each of the transistors has a corresponding MRAM.