Semiconductor fuse arrangements

A semiconductor fuse arrangement, comprising:

• a semiconductor substrate;
• a plurality of electrically conductive interconnects having contact surfaces at or beneath a first elevational level relative to the substrate;
• a plurality of electrically conductive links extending upwardly from the contact surfaces of the electrically conductive interconnects;
• and
• an electrically conductive plate in electrical contact with the links, the conductive plate being at an elevational level above said first elevational level, each of the links contacting the electrically conductive plate at a separate region relative to the other links, the region where a link makes contact to the electrically conductive plate being a fuse, and the interconnections of the electrically conductive plate with the upwardly extending links thus being a fuse arrangement.