Non-volatile memory device and method of fabricating the same

A non-volatile memory device comprising:

• a gate insulation layer, which is formed on a semiconductor substrate on which source and drain regions are formed;
• a main gate electrode, which is formed on the gate insulation layer;
• a sub gate electrode, which is formed on sidewalls of the main gate electrode;
• a trapping structure, which is interposed between the sub gate electrode and the semiconductor substrate and comprises an electron tunneling layer and a charge trapping layer;
• and
• an electron back-tunneling prevention layer, which is interposed between the gate electrode and the charge trapping layer, prevents electrons in the sub gate electrode from back-tunneling through the charge trapping layer, and is formed of a metal having a higher work function than the sub gate electrode.

A non-volatile memory device comprising:

• a gate insulation layer, which is formed on a semiconductor substrate where source and drain regions are formed;
• a main gate electrode, which is formed on the gate insulation layer;
• a trapping structure, which is formed on sidewalls of the main gate electrode and comprises an electron tunneling layer and a charge trapping layer;
• and
• a sub gate electrode formed on the trapping structure, wherein the sub gate electrode is formed of metal that prevents electrons therein from back-tunneling to the charge trapping layer.