US 2005/0239257 A1 · Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device

Abstract

A method for manufacturing a semiconductor integrated circuit device includes the steps of forming an isolation trench in an isolation region of a semiconductor substrate, filling the isolation trench up to predetermined middle position in its depth direction with a first insulating film deposited by a coating method, filling a remaining depth portion of the isolation trench into which the first insulating film is filled with a second insulating film, then forming a plurality of patterns on the semiconductor substrate, filling a trench forming between the plurality of patterns up to predetermined middle position in a trench depth direction with a third insulating film deposited by a coating method, and filling a remaining portion of the trench into which the third insulating film is filled with a fourth insulating film that is more difficult to etch than the third insulating film. The method may also include the step of forming dummy patters in a relatively large isolation region of isolation regions with relatively different planar dimensions before the first insulating film is deposited.

Claims15

Dependent claims

A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:

(a) forming an isolation trench in an isolation region of a semiconductor substrate surrounding a plurality of active regions;
(b) filling said isolation trench up to a predetermined position in its depth direction with a first insulating film deposited by a coating method;
(c) depositing a second insulating film on a main surface of said semiconductor substrate by a chemical vapor deposition method so as to fill a remaining depth portion of said isolation trench;
(d) polishing said second insulating film on said main surface of said semiconductor substrate by a chemical mechanical polishing method;
(e) forming a third insulating film on said second insulating film in said active regions;
(f) forming a hole on each of said active regions by etching said third insulating film such that a part of each hole extends onto said second insulating film;
and
(g) forming a conductive layer on the surface of said second insulating film and said active region in said hole,
wherein an etching rate of said second insulating film is lower than that of said first insulating film.

6 more elements

Dependencies are inferred from the claim text.

Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device

Life of this patent

Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device

Life of this patent

Abstract

Claims15