Nonvolatile semiconductor memory and method of operating the same
AssigneeSharp Kabushiki Kaisha
InventorYoshimitsu Yamauchi
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Abstract
A nonvolatile semiconductor memory having a memory cell comprises: a semiconductor substrate having a pair of trenches formed on a surface thereof; first electrodes formed in a pair of trenches through the intervention of a first insulating film, respectively; a second electrode formed on the semiconductor substrate between the trenches through the intervention of a second insulating film; and a third electrode formed on the second electrode through the intervention of a third insulating film.
Claims5
1-4. (canceled)
A method of reading a nonvolatile semiconductor memory having a memory cell comprising:
- a semiconductor substrate having a pair of trenches formed on a surface thereof;
- first electrodes formed in a pair of trenches through the intervention of a first insulating film to form selective transistors, respectively;
- a second electrode formed on the semiconductor substrate between the trenches through the intervention of a second insulating film;
- and a third electrode formed on the second electrode through the intervention of a third insulating film,
- wherein a voltage higher than a threshold value of the selective transistors is applied to the first electrodes, respectively, to change the two selective transistors into the ON state, thereby reading the memory cell.
A method of writing a nonvolatile semiconductor memory having a memory cell comprising:
- a semiconductor substrate having a pair of trenches formed on a surface thereof;
- first electrodes formed in a pair of trenches through the intervention of a first insulating film to form selective transistors, respectively;
- a second electrode formed on the semiconductor substrate between the trenches through the intervention of a second insulating film;
- and a third electrode formed on the second electrode through the intervention of a third insulating film,
- wherein a voltage is applied to one of the first electrodes, the voltage being higher than a threshold value of the selective transistor, to change the selective transistor into the ON state and a voltage is applied to another first electrode, the voltage being lower than a threshold value of the selective transistor, to change the selective transistor into the OFF state, thereby writing the memory cell.
7-13. (canceled)
A method of writing a nonvolatile semiconductor memory comprising a semiconductor substrate having a pair of trenches formed on a surface thereof;
- first electrodes formed in a pair of trenches through the intervention of a first insulating film, respectively;
- a second electrode formed on the semiconductor substrate between the trenches through the intervention of a second insulating film;
- a third electrode formed on the second electrode through the intervention of a third insulating film;
- wherein a plurality of the memory cells are arranged in matrix, the memory cells arranged in the X direction are connected with the third electrode lying in the X direction;
- the memory cells arranged in the Y direction are connected with the first electrode lying in the Y direction;
- the memory cells are connected to a pair of source/drain regions via selective transistors comprised of the first electrodes, respectively, to share the source/drain regions;
- wherein the first electrodes of the selective transistors connected to the drain regions are electrically isolated such that different voltages can be applied thereto, wherein a writing operation in the method comprises:
- (1) a first step of applying a voltage to the first electrode of the selective transistor connected to the source region, the voltage being lower than a threshold value of the selective transistor,
- applying a predetermined voltage to the drain regions and
- applying a voltage to all the first electrodes of the selective transistors connected to the drain regions, the voltage being higher than a threshold value of the selective transistors, to charge a channel region immediately below the second electrode of the memory cell with a drain voltage;
- and
- (2) a second step of applying a voltage to the first electrode of the selective transistor connected to the drain region of an unselected memory cell, the voltage being lower than a threshold value of the selective transistor,
- grounding a drain region connected to a selected memory cell and
- applying a voltage to the third electrode comprising the selected memory cell, the voltage being higher than a threshold value of the selected memory cell.
Dependencies are inferred from the claim text.