System and method for controlling manufacturing processes, and method for manufacturing a semiconductor device

A computer implemented method for controlling a plurality of manufacturing processes, comprising:

• inspecting a dislocation image of a dislocation in a semiconductor substrate processed by a plurality of manufacturing processes;
• acquiring a plurality of process conditions of the manufacturing processes;
• acquiring a structure of the semiconductor substrate processed by a target manufacturing process;
• calculating stresses at a plurality of nodes provided in the structure based on a target process condition of the target manufacturing process and the structure;
• providing a plurality of origins at positions where a stress concentration having a stress value not less than a reference value is predicted;
• calculating a growth process of an analysis dislocation line in a stress field by the stresses for each position of the origins so as to predict a dislocation pattern of the analysis dislocation line;
• and
• comparing the dislocation pattern of the analysis dislocation line with the inspected dislocation image so as to determine whether the target process is a critical manufacturing process that generates the dislocation.

A method for manufacturing a semiconductor device, comprising:

• performing a plurality of manufacturing processes on a semiconductor substrate;
• inspecting a dislocation image of a dislocation in the semiconductor substrate;
• creating a corrected target process condition by processing includes:
• acquiring the inspected dislocation image;
• acquiring a plurality of process conditions of the manufacturing processes;
• acquiring a structure of the semiconductor substrate processed by a target manufacturing process;
• calculating stresses at a plurality of nodes provided in the structure based on a target process condition of the target manufacturing process and the structure;
• providing a plurality of origins at positions where a stress concentration having a stress value not less than a reference value is predicted;
• calculating a dislocation pattern of an analysis dislocation line in a stress field by the stresses for each position of the origins;
• comparing the dislocation pattern of the analysis dislocation line with the inspected dislocation image so as to determine whether the target process is a critical manufacturing process that generates the dislocation in the semiconductor substrate;
• selecting a target structure parameter from among a plurality of structure parameters, the structure parameters specifying the structure processed by the critical manufacturing process;
• and
• predicting a critical value of the target structure parameter which causes a failure based on a second dislocation pattern of a second analysis dislocation line provided by varying a value of the target structure parameter, so as to correct a critical process condition of the critical manufacturing process;
• and
• performing the target manufacturing process on another semiconductor substrate by the corrected target process condition.