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US 2005/0230815 A1Published application
Interconnect alloys and methods and apparatus using same
AssigneeMicron Technology, Inc.
InventorPaul Farrar
Life of this patent
Estimating the term…
Abstract
Integrated circuit interconnect alloys having copper, silver or gold as the major constituent element. The resulting reduction in melting temperature allows for improved coverage of high aspect ratio features with reduced deposition pressure. The alloys are used to fabricate interconnects in integrated circuits, such as memory devices. The interconnects can be high aspect ratio features formed using a dual damascene process. The integrated circuits having the interconnects are applicable to semiconductor dies, devices, modules and systems.
Claims79
An integrated circuit interconnect, comprising:
- a Group 1B transition metal as a major constituent element of the interconnect;
- at least one additional element having a predetermined percent solubility by weight in the major constituent element to provide a predetermined eutectic temperature with the Group 1B metal that is lower than a melting point of the major constituent element.
An integrated circuit interconnect, comprising:
- a Group 1B transition metal as a major constituent element of the interconnect:
- at least one additional element to lower a eutectic temperature of the Group 1B metal,
- wherein the at least one additional element has less than approximately 2% solubility by weight in the Group 1B transition metal at approximately 100° C., wherein each at least one additional element individually produces a eutectic temperature with the Group 1B transition metal of more than 90° C. below the melting point of the pure Group 1B transition metal.
An integrated circuit interconnect, comprising:
- a Group 1B transition metal as a major constituent element of the interconnect;
- at least one additional element to lower a eutectic temperature of the Group 1B metal,
- wherein at least one additional element individually produces a eutectic temperature with the Group 1B transition metal of more than 300° C. below the melting point of the pure Group 1B transition metal.
An integrated circuit interconnect, comprising:
- a Group 1B transition metal as a major constituent element of the interconnect;
- at least one additional element to lower a eutectic temperature of the Group 1B metal,
- wherein at least one additional element individually produces a eutectic temperature with the Group 1B transition metal of more than 600° C. below the melting point of the pure Group 1B transition metal.
An integrated circuit interconnect, comprising:
- copper;
- and
- at least two elements selected from the group consisting of magnesium, phosphorous, titanium, hafnium and zirconium.
An integrated circuit interconnect, comprising:
- copper as a major constituent element;
- magnesium;
- and
- phosphorous.
1 more element
An integrated circuit interconnect, comprising:
- silver as a major constituent element;
- and
- bismuth.
An integrated circuit interconnect, comprising:
- silver;
- approximately 1.6 to 2.6% by weight of bismuth;
- and
- less than approximately 1% by weight of silicon.
1 more element
An integrated circuit interconnect comprising:
- gold;
- and
- at least one additional element having a predetermined percent solubility by weight in the gold to provide a predetermined eutectic temperature with the gold that is lower than a melting point of gold, the at least one additional element being selected from the group consisting of bismuth, lead, antimony and silicon.
35-58. (canceled)
A semiconductor die, comprising:
- a substrate;
- and
- an integrated circuit supported by the substrate, wherein the integrated circuit has a plurality of interconnects, wherein at least one of the plurality of interconnects comprises an alloy, the alloy comprising:
- a Group 1B transition metal as a major constituent element of the interconnect;
- and
- at least one additional element having a predetermined percent solubility by weight in the major constituent element to provide a predetermined eutectic temperature with the Group 1B metal that is lower than a melting point of the major constituent element.
3 more elements
A semiconductor die, comprising:
- a substrate;
- and
- an integrated circuit supported by the substrate, wherein the integrated circuit has a plurality of interconnects, wherein at least one of the plurality of interconnects comprises an alloy, the alloy comprising:
- copper;
- and
- at least two elements selected from the group consisting of magnesium, phosphorous, titanium, hafnium and zirconium.
3 more elements
A semiconductor die, comprising:
- a substrate;
- and
- an integrated circuit supported by the substrate, wherein the integrated circuit has a plurality of interconnects, wherein at least one of the plurality of interconnects comprises an alloy, the alloy comprising silver and bismuth, the bismuth having a predetermined percent solubility by weight in the silver to provide a predetermined eutectic temperature with the silver that is lower than a melting point of silver.
A semiconductor die, comprising:
- a substrate;
- and
- an integrated circuit supported by the substrate, wherein the integrated circuit has a plurality of interconnects, wherein at least one of the plurality of interconnects comprises an alloy, the alloy comprising:
- gold;
- and
- at least one additional element having a predetermined percent solubility by weight in the gold to provide a predetermined eutectic temperature with the gold that is lower than a melting point of gold, the at least one additional element being selected from the group consisting of bismuth, lead, antimony and silicon.
3 more elements
A memory module, comprising:
- a support;
- a plurality of leads extending from the support;
- a command link coupled to at least one of the plurality of leads;
- a plurality of data links, wherein each data link is coupled to at least one of the plurality of leads;
- and
- at least one memory device contained on the support and coupled to the command link,
- wherein the at least one memory device comprises:
- an array of memory cells;
- internal circuitry;
- and
- a plurality of interconnects coupled to the array of memory cells and internal circuitry, wherein at least one of the plurality of interconnects comprises an alloy, the alloy comprising:
- a Group 1B transition metal as a major constituent element of the interconnect;
- and
- at least one additional element to lower a eutectic temperature of the Group 1B metal.
11 more elements
A memory module, comprising:
- a support;
- a plurality of leads extending from the support;
- a command link coupled to at least one of the plurality of leads;
- a plurality of data links, wherein each data link is coupled to at least one of the plurality of leads;
- and
- at least one memory device contained on the support and coupled to the command link, wherein the at least one memory device comprises:
- an array of memory cells;
- internal circuitry;
- and
- a plurality of interconnects coupled to the array of memory cells and internal circuitry, wherein at least one of the plurality of interconnects comprises an alloy, the alloy comprising:
- copper;
- and
- at least two elements selected from the group consisting of magnesium, phosphorous, titanium, hafnium and zirconium.
10 more elements
A memory module, comprising:
- a support;
- a plurality of leads extending from the support;
- a command link coupled to at least one of the plurality of leads;
- a plurality of data links, wherein each data link is coupled to at least one of the plurality of leads;
- and
- at least one memory device contained on the support and coupled to the command link, wherein the at least one memory device comprises:
- an array of memory cells;
- internal circuitry;
- and
- a plurality of interconnects coupled to the array of memory cells and internal circuitry, wherein at least one of the plurality of interconnects comprises an alloy, the alloy comprising silver and bismuth.
7 more elements
A memory module, comprising:
- a support;
- a plurality of leads extending from the support;
- a command link coupled to at least one of the plurality of leads;
- a plurality of data links, wherein each data link is coupled to at least one of the plurality of leads;
- and
- at least one memory device contained on the support and coupled to the command link, wherein the at least one memory device comprises:
- an array of memory cells;
- internal circuitry;
- and
- a plurality of interconnects coupled to the array of memory cells and internal circuitry, wherein at least one of the plurality of interconnects comprises an alloy, the alloy comprising:
- gold;
- and
- at least one element selected from the group consisting of bismuth, lead, antimony and silicon.
10 more elements
Dependencies are inferred from the claim text.