High-speed, current-driven latch
AssigneeLinear Technology Corporation
InventorKarl Edwards
Life of this patent
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Abstract
A high-speed, current-driven latch is provided. The latch conducts a current and includes an output, a SET circuit and a RESET circuit. The output is variable between a first state and a second state. The SET circuit conducts the current present in the latch at the first state such that the SET circuit is maintained close to a level required to change the output of the transistor from the first to the second level, and the RESET circuit conducts the current at the second level such that the RESET circuit is close to a level required to change the output of the transistor from the second level to the first level.
Claims14
A latch circuit having a total current and at least one output, the output having a first state and a second state, the output being controllable by a first trigger signal and a second trigger signal, the latch circuit comprising:
- a first latch transistor;
- a second latch transistor coupled to the first latch transistor;
- a SET transistor coupled to the first latch transistor;
- and
- a RESET transistor coupled to the second latch transistor wherein at least one of the conditions from the group consisting of the following is true:
- 1) at the first state, the total current is conducted by the first latch transistor and the SET transistor, wherein the SET transistor switches when the first trigger signal is applied to the SET transistor, and wherein the first trigger signal creates a very small difference in voltage, and 2) at the second state, the total current is conducted by the second latch transistor and the RESET transistor, wherein the RESET transistor switches when the second trigger signal is applied to the RESET transistor, and wherein the second trigger signal creates a very small difference in voltage.
Dependencies are inferred from the claim text.