Ordering of high use program code segments using simulated annealing
AssigneeInternational Business Machines Corporation
InventorRoss Johnson
Life of this patent
Estimating the term…
Abstract
An apparatus, program product and method utilize a heuristic-based algorithm such as simulated annealing to order program code segments in a computer memory to provide improved computer performance in terms of memory access, e.g., by minimizing cache misses or other memory-related performance penalties that may be present in a multi-level memory architecture. Program code is ordered in a computer memory by selecting an ordering from among a plurality of orderings for a plurality of program code segments using a heuristic algorithm, and ordering the plurality of program code segments in a memory of a computer using the selected ordering.
Claims31
A method of ordering program code in a computer memory, the method comprising:
- selecting an ordering from among a plurality of orderings for a plurality of program code segments using a heuristic algorithm;
- and
- ordering the plurality of program code segments in a memory of a computer using the selected ordering.
An apparatus, comprising:
- a processor;
- and
- program code configured to be executed by the processor to optimize execution of program code in a computer of the type including a multi-level memory architecture by using a heuristic algorithm to select an ordering from among a plurality of orderings for a plurality of program code segments in the program code.
A program product, comprising:
- first program code configured to optimize execution of second program code in a computer of the type including a multi-level memory architecture by using a heuristic algorithm to select an ordering from among a plurality of orderings for a plurality of program code segments in the second program code;
- and
- a signal bearing medium bearing the first program code.
Dependencies are inferred from the claim text.