Timing verification, automated multicycle generation and verification

A system for generating consistent functional and timing definitions comprising:

• a common source description, the common source description corresponding to multicycle paths in an integrated circuit chip design;
• means for transforming the common source description to a functional definition;
• means for monitoring a functional simulation of the integrated circuit chip design using the functional definition;
• means for transforming the common source description to a timing definition;
• means for performing a timing analysis of the integrated circuit chip design using the timing definition.

An apparatus for generating consistent functional and timing definitions comprising:

• a common source description, the common source description corresponding to multicycle paths in an integrated circuit chip design;
• a transforming module, the transforming module transforming the common source description to a functional definition;
• a monitoring module, the monitoring module monitoring a functional simulation of the integrated circuit chip design using the functional definition;
• a timing transforming module, the timing transforming module transforming the common source description to a timing definition;
• a timing analysis module, the timing analysis module performing a timing analysis of the integrated circuit chip design using the timing definition.