Manufacturing method for semiconductor device
OwnerKazuaki Nakajima, Kyoichi Suguroinventors
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OwnerKazuaki Nakajima, Kyoichi Suguroinventors
Estimating the term…
Disclosed is a manufacturing method for a semiconductor device comprising forming a structure comprising a first gate insulating film provided in a first region, a first conducting portion provided on the first gate insulating film, a second gate insulating film provided in a second region, and a second conducting portion provided on the second gate insulating film, the first conducting portion and second conducting portion being formed of the same conducting film, a work function of a bottom of the first conducting portion being equal to a work function of a bottom of the second conducting portion, forming a third conducting portion on the second conducting portion by a plating method, and varying the work function of the bottom of the second conducting portion by diffusing a metal element contained in the third conducting portion to the second conducting portion.
A manufacturing method for a semiconductor device comprising a first conduction type MIS transistor provided in a first region and a second conduction type MIS transistor provided in a second region, the method comprising:
A manufacturing method for a semiconductor device comprising a first conduction type MIS transistor provided in a first region and a second conduction type MIS transistor provided in a second region, the method comprising:
Dependencies are inferred from the claim text.