MOS transistor and fabrication method thereof
AssigneeDongbuAnam Semiconductor Inc.
InventorKwan-Ju Koh
Life of this patent
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Abstract
A MOS transistor and a method for fabricating the MOS transistor. The present invention enables implementation of a stable semiconductor device that is capable of protecting against leakage current generation by improving the “LDD effect” and securing a large process margin by adjusting an “off” current. The method for fabricating a MOS transistor includes placing or arranging an epitaxial layer between a silicon wafer and a gate electrode, and forming three impurity regions, including a very low concentration impurity region, and a low concentration impurity region and a high concentration impurity region (source and drain region).
Claims20
A method for fabricating a MOS transistor comprising the steps of:
- a) forming low concentration impurity regions in a semiconductor substrate;
- b) sequentially forming an epitaxial layer and gate oxide layer on the semiconductor substrate;
- c) forming a gate on said gate oxide layer, between the low concentration impurity regions, with a CD narrower than that between the low concentration impurity regions;
- d) forming very low concentration impurity regions in the epitaxial layer using the gate as a mask;
- e) forming spacers adjacent to the gate and the epitaxial layer;
- and
- f) forming source/drain regions in the semiconductor substrate using the spacer as a mask.
A MOS transistor comprising:
- a) an epitaxial layer formed on a semiconductor substrate;
- b) a gate oxide layer formed on the epitaxial layer;
- c) a gate formed on the gate oxide layer having a width that is narrower than that of the epitaxial layer;
- d) spacers formed on sidewalls of the gate and the epitaxial layer;
- e) a very low concentration impurity region in the epitaxial layer;
- f) a low concentration impurity region in the semiconductor substrate having a higher concentration than that of the very low concentration region;
- and
- g) source/drain region in the semiconductor substrate having a higher concentration than that of the low concentration region.
Dependencies are inferred from the claim text.