Wafer protective cassette
AssigneeChartered Semiconductor Manufacturing Ltd.
InventorsTong Hua, Chia Hong, Zhang Jian, Tan Yong
Life of this patent
Estimating the term…
Abstract
A substrate cassette having a conventional form, an open container having an upper entrance and a narrow lower opening formed by two side panels and two end panels. A preferred embodiment includes a train of substrate alignment channels on the inner surfaces of the two side panels, each channel is U shaped and having planar surface with a left surface, a right surface, and a bottom surface. An arcuate curbing member disposed on a left surface in each of the substrate alignment channels. The arcuate curbing member includes a top end with a thinner sloped profile facing the upper open entrance of the cassette allowing a substrate to slide through and under a stepped lower end.
Claims30
A substrate carrier for securing semiconductor substrates, comprising:
- a cassette having
- an upper substrate entrance.
- a lower substrate support opening.
- a first side panel having an inner surface thereof, a train of parallel substrate support channels, said support channels having a bottom surface, a left side surface and a right side surface, said left and right side surfaces are perpendicular to said bottom surface.
- a second side panel opposite said first side panel, having, on an inner surface a matching train of parallel substrate support channels;
- an arcuate curbing member disposed on a left side surface in each of said channels, and including
- a top end having a sloped segment facing said entrance of said cassette permitting a substrate to slide by a necked portion of said substrate support channel, provided by said sloped segment, into a stepped bottom, therein securing said substrate.
A wafer carrier for securing semiconductor wafers, comprising:
- a cassette having
- an upper wafer entrance.
- a lower wafer support opening.
- a first side panel having an inner surface thereof, a train of parallel wafer support channels, said support channels having a bottom surface, a left side surface and a right side surface, said left and right side surfaces are perpendicular to said bottom surface.
- a second side panel opposite said first side panel, having, on an inner surface a matching train of parallel wafer support channels;
- an arcuate curbing member disposed on a left side surface in each of said channels, and including
- a top end having a sloped segment facing said entrance of said cassette permitting a wafer to slide by a necked portion of said wafer support channel, provided by said sloped segment, into a stepped bottom, therein securing said wafer.
A method for protecting semiconductor wafers in a wafer carrier, comprising the steps of:
- providing a cassette having
- an upper wafer entrance.
- a lower wafer support opening.
- a first side panel having an inner surface thereof, a train of parallel wafer support channels, said support channels having a bottom surface, a left side surface and a right side surface, said left and right side surfaces are perpendicular to said bottom surface.
- a second side panel opposite said first side panel, having, on an inner surface a matching train of parallel wafer support channels;
- an arcuate curbing member disposed on a left side surface in each of said channels, and including
- a top end having a sloped segment facing said entrance of said cassette permitting a wafer to slide by a necked portion of said wafer support channel, provided by said sloped segment, into a stepped bottom, therein securing said wafer.
Dependencies are inferred from the claim text.