Bridge for removing master-induced stalls on a data bus
AssigneeLSI Logic Corporation
InventorsJeffrey J. Holm, Scott T. McCormick
Life of this patent
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Abstract
A data bus bridge circuit and method are provided for coupling a slave device with a data bus in a system in which data words are transferred between a master device and the slave device over the data bus. The bridge circuit removes master-induced stalls of burst transfers by converting those burst transfers into a plurality of separate, independent sub-bursts.
Claims17
A process of transferring data words between a master device and a slave device over a data bus, the process comprising:
- (a) initiating a burst type transfer command over the data bus for transferring multiple data words in a first burst;
- (b) successively transferring individual ones of the multiple data words in the first burst between the master device and the slave device in response to the burst type transfer command;
- (c) selectively inducing a stall of further transfers within the first burst during step (b) by the master device;
- and
- (d) in response to step (c), dividing the first burst into a plurality of separate, independent sub-bursts, wherein each independent sub-burst comprises at least one of the data words in the first burst.
A data bus bridge for coupling to a data bus between a master device and a slave device in a system in which data words are transferred between a master device and the slave device in a burst over the data bus, the bridge comprising:
- means for receiving a stall command for the burst from the master device;
- and
- means for dividing the burst into a plurality of separate, independent sub-bursts, in response to the stall command, wherein each independent sub-burst comprises at least one of the data words in the burst.
A bridge circuit for coupling between a first data bus and a simplified, second data bus, wherein the first and second data buses include a data field, an address field, and a transfer type field, and wherein bridge circuit comprises:
- a transfer type input coupled to the transfer type field of the first data bus, which identifies one of the following transfer types:
- (a) a non-sequential transfer type used for single data word transfers and for a first of a plurality of successive data word transfers in a burst;
- (b) a sequential transfer type used for all subsequent transfers in the burst;
- (c) a busy transfer type indicating the burst transfer is continuing on the first bus, but a next transfer in the burst is stalled;
- and (d) an idle transfer type indicating no transfers are required over the first bus;
- a modified transfer type output coupled to the transfer type field of the second data bus;
- and
- a transfer type conversion circuit, which replaces any of the busy transfer types received on the transfer type input with the idle transfer type on the modified transfer type output.
Dependencies are inferred from the claim text.