Manufacturing method of shallow trench isolation
AssigneeSilicon Integrated Systems Corp.
InventorsPing-Wei Lin, Gwo-Chyuan Kuoh, Chao-Sheng Chiang
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AssigneeSilicon Integrated Systems Corp.
InventorsPing-Wei Lin, Gwo-Chyuan Kuoh, Chao-Sheng Chiang
Estimating the term…
The present invention disclosed a manufacturing method of shallow trench isolation (STI). By making use of depositing two layer of SiON with specific thickness and different extinction coefficient (k) as the ARC, comprising: (a) Depositing pad oxide/silicon nitride on a substrate as a hard mask for etching; (b) Depositing a layer of high extinction coefficient SiON on said silicon nitride, then depositing a layer of low extinction coefficient SiON as the ARC; (c) Exposing by using a STI mask and developing to form an etching mask of said STI; (d) Etching said SiON, silicon nitride, pad oxide and said substrate to form a shallow trench; (e) Growing an oxide layer on the side-wall and the bottom of said shallow trench to remove damage and decrease leakage; (f) Depositing an oxide layer on said shallow trench and said silicon nitride to fill said shallow trench; (g) planarizing by CMP.
A manufacturing method of shallow trench isolation, comprising:
A manufacturing method of shallow trench isolation, comprising:
Dependencies are inferred from the claim text.