Buried magnetic tunnel-junction memory cell and methods
AssigneeHewlett-Packard Development Company, L.P.
InventorsPeter J. Fricke, Andrew Koll, Andrew L. Van Brocklin
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Abstract
A magnetic memory cell made on a substrate has a first metal conductor, a first magnetic layer disposed on the first metal conductor, a planar interlayer dielectric (ILD) having a via opening extending through it to the first magnetic layer, a buried tunnel junction over the first magnetic layer within the via opening, a second magnetic layer filling the via opening and burying the tunnel junction, and a second metal conductor coupled to the second magnetic layer. Methods for using the memory cell in memories and other devices and methods specially adapted for fabrication of the memory cell are disclosed.
Claims71
A method for fabricating a memory cell, the method comprising the steps of:
- a) providing a substrate;
- b) depositing a first metal layer, and patterning and etching a first metal conductor;
- c) depositing, patterning, and etching a first ferromagnetic layer;
- d) depositing an interlayer dielectric (ILD);
- e) etching a via opening through the interlayer dielectric in at least partial alignment with the first metal conductor, uncovering a portion of the first ferromagnetic layer;
- f) forming a thin tunnel-junction oxide layer over at least the uncovered portion of the first ferromagnetic layer;
- g) depositing a second ferromagnetic layer, at least filling the via opening;
- h) planarizing the resultant surface to the surface of the interlayer dielectric;
- and
- i) depositing a second metal layer, and patterning and etching a second metal conductor in at least partial alignment with the via opening filled with the second ferromagnetic layer.
A method for fabricating a memory cell, the method comprising the steps of:
- a) providing a substrate;
- b) depositing a first metal layer, and patterning and etching a first metal conductor;
- c) depositing a first interlayer dielectric (ILD);
- d) etching a first via opening through the first interlayer dielectric in at least partial alignment with the first metal conductor, uncovering a portion of the first metal conductor;
- e) forming a first thin tunnel-junction oxide layer over at least the uncovered portion of the first metal conductor;
- f) depositing a first ferromagnetic substance, at least filling the first via opening;
- g) planarizing the resultant surface to the surface of the first interlayer dielectric;
- h) depositing a second interlayer dielectric (ILD);
- i) etching a second via opening through the second interlayer dielectric in at least partial alignment with the first ferromagnetic substance in the first via opening, thus exposing a portion of the first ferromagnetic substance;
- j) forming a second thin tunnel-junction oxide layer over at least the portion of the first ferromagnetic substance exposed;
- k) depositing a second ferromagnetic substance, at least filling the second via opening;
- l) planarizing the resultant surface to the surface of the second interlayer dielectric;
- and
- m) depositing a second metal layer, and patterning and etching a second metal conductor in at least partial alignment with the via opening filled with the second ferromagnetic substance.
A magnetic tunnel-junction memory cell comprising in combination:
- a) means for storing a bit of information in a magnetic layer;
- b) tunnel-junction means for switching the bit of information, the tunnel-junction means for switching being coupled with the means for storing and being buried under the means for storing;
- and
- c) means for controlling the tunnel-junction means for switching.
A memory cell comprising:
- a) a substrate;
- b) a first metal layer disposed on the substrate, the first metal layer being patterned to form a first metal conductor;
- c) a first ferromagnetic layer disposed over the first metal conductor, whereby the first metal conductor is coupled to the first ferromagnetic layer;
- d) a planar interlayer dielectric (ILD), the interlayer dielectric having a via opening extending therethrough, the via opening being at least partially aligned with the first metal conductor;
- e) a tunnel junction over at least a portion of the first ferromagnetic layer within the via opening;
- f) a second ferromagnetic layer filling the via opening and burying the tunnel junction;
- and
- g) a second metal layer, patterned to form a second metal conductor at least partially aligned with the via opening filled with the second ferromagnetic layer, whereby the second metal conductor is coupled to the second ferromagnetic layer.
A memory cell comprising:
- a) a substrate;
- b) a first metal layer disposed on the substrate, the first metal layer being patterned to form a first metal conductor;
- c) a planar first interlayer dielectric (ILD), the first interlayer dielectric having a first via opening extending therethrough, the first via opening being at least partially aligned with the first metal conductor;
- d) a first tunnel junction over at least a portion of the first metal conductor within the first via opening;
- e) a first ferromagnetic layer filling the first via opening and burying the tunnel junction;
- f) a planar second interlayer dielectric (ILD), the second interlayer dielectric having a second via opening extending therethrough, the second via opening being at least partially aligned with the first via opening filled with the first ferromagnetic layer;
- e) a second tunnel junction over at least a portion of the first ferromagnetic layerwithin the second via opening;
- f) a second ferromagnetic layer filling the second via opening and burying the second tunnel junction;
- and
- g) a second metal layer, patterned to form a second metal conductor in at least partial alignment with the second via opening filled with the second ferromagnetic layer, whereby the second metal conductor is coupled to the second ferromagnetic layer.
A method of using a memory cell of the type having a magnetic storage element and a tunnel-junction sensing element in a cross-point memory structure of the type having a column line and a row line, the method comprising the steps of:
- a) coupling a first line of the row and column lines to a magnetic material disposed to form the storage element of each memory cell;
- b) coupling the remaining line of the row and column lines to a buried tunnel junction under the magnetic material, thereby forming the sensing element of each memory cell;
- and
- c) controlling each sensing element to selectively sense the state of the magnetic material at a selected row-column combination.
Dependencies are inferred from the claim text.