Manufacturing method for a semiconductor device
AssigneeSeiko Instruments Inc.
InventorJun Osanai
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Abstract
To provide a manufacturing method for a bipolar gate CMOS semiconductor device, which enables cost reduction and stable element characteristics. In a manufacturing method for a bipolar gate CMOS semiconductor device, an N-type region is selectively formed in a polycrystalline silicon constituting a gate electrode through predeposition using as a mask an insulating film, after which the insulating film is removed to implant P-type impurity ions into an entire surface, whereby the semiconductor device can be provided at a low cost with the stable element characteristics.
Claims6
A manufacturing method for a semiconductor device characterized by comprising:
- a step of forming an element isolation region and a gate insulating film on a semiconductor substrate;
- a step of forming a polycrystalline silicon film, for subsequently forming a gate electrode on the element isolation region and the gate insulating film;
- a step of forming an insulating film on the polycrystalline silicon film;
- a step of patterning the insulating film so as to open a region other than a region subsequently serving as a PMOS;
- a step of changing the region of the polycrystalline silicon film corresponding to an insulating film opening into an N-type region by heat treatment in a diffusion furnace in an N-type impurity atmosphere;
- a step of removing the insulating film patterned;
- and
- a step of doping a P-type impurity into an entire surface of the polycrystalline silicon film through an ion implantation.
Dependencies are inferred from the claim text.