Semiconductor integrated circuit device and a method of manufacturing the same

A semiconductor integrated circuit device comprising:

• (a) three or more element forming regions formed on a surface of a semiconductor substrate and defined by an insulating film, said three or more element forming regions each extending in a first direction and being arranged in a second direction perpendicular to said first direction;
• and
• (b) a plurality of memory cells formed on main surfaces of said three or more element forming regions,
• wherein the width in said second direction of an outermost element forming region out of said three or more element forming regions is larger than the width of each of the other element forming regions.

A semiconductor integrated circuit device comprising:

• (a) three or more element forming regions formed on a surface of a semiconductor substrate and defined by an insulating film, said three or more element forming regions each extending in a first direction and being arranged in a second direction perpendicular to said first direction;
• and
• (b) a plurality of memory cells formed on main surfaces of the element forming regions other than an outermost element forming region, out of said three or more element forming regions,
• wherein a cell functioning as a memory cell is not formed on said outermost element forming region.

A semiconductor integrated circuit device comprising:

• (a) three or more element forming regions formed on a surface of a semiconductor substrate and defined by an insulating film, said three or more element forming regions each extending in a first direction and being arranged in a direction perpendicular to said first direction;
• and
• (b) a plurality of memory cells formed on each of said element forming regions, said memory cells each including:
• (b1) a first electrode constituted by a first conductive film formed through a first insulating film;
• (b2) a second electrode constituted by a second conductive film formed through a second insulating film on said first electrode, said second electrode extending in said second direction;
• and
• (b3) semiconductor regions formed on the element forming region on both sides of said second electrode,
• wherein the memory cells formed on an outermost element forming region out of said three or more element forming regions do not function as memory cells.

A semiconductor integrated circuit device comprising:

• (a) an element forming region formed on a surface of a semiconductor substrate and defined by an insulating film, said element forming region having three or more element forming portions extending in a first direction and arranged in a second direction perpendicular to said first direction and a connecting portion extending in said second direction to connect end portions of said three or more element forming portions;
• and
• (b) a plurality of memory cells formed on each of said element forming regions, said memory cells each having:
• (b1) a first electrode constituted by a first conductive film formed through a first insulating film;
• (b2) a second electrode constituted by a second conductive film formed through a second insulating film on said first electrode, said second electrode extending in said second direction;
• and
• (b3) semiconductor regions formed in said element forming region on both sides of said second electrode,
• wherein the memory cells formed on an outermost element forming portion out of said three or more element forming portions do not function as memory cells.

A method of manufacturing a semiconductor integrated circuit device, comprising the steps of:

• forming an insulating film on a semiconductor substrate with semiconductor elements formed thereon;
• forming connecting holes and wiring trenches in said insulating film;
• forming a pre-washing protective film on side walls of said connecting holes and said wiring trenches;
• and
• performing pre-washing for said semiconductor substrate and subsequently burying a conductive film in said connecting holes and said wiring trenches.

A semiconductor integrated circuit device comprising:

• (a) three or more element forming regions formed on a surface of a semiconductor substrate and defined by an insulating film, said three or more element forming regions each extending in a first direction and being arranged in a second direction perpendicular to said first direction;
• (b) a plurality of memory cells formed on each of said element forming regions, said memory cells each including:
• (b1) a first electrode constituted by a first conductive film formed through a first insulating film;
• (b2) a second electrode constituted by a second conductive film formed through a second insulating film on said first electrode, said second electrode extending in said second direction;
• and
• (b3) semiconductor regions formed on the element forming region on both sides of said second electrode, wherein pseudo memory cells formed on an outermost element forming region out of said three or more element forming regions do not function as memory cells, and wherein a semiconductor region of said pseudo memory cell is connected with ground potential.